• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.693-695
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• 2012

This paper have presented the breakdown voltage for double gate(DG) MOSFET. The analytical solution of Poisson's equation and Fulop's breakdown condition have been used to analyze for breakdown voltage. The double gate(DG) MOSFET as the device to be able to use until nano scale has the adventage to reduce the short channel effects. But we need the study for the breakdown voltage of DGMOSFET since the decrease of the breakdown voltage is unavoidable. To approximate with experimental values, we have used the Gaussian function as charge distribution for Poisson's equation, and the change of breakdown voltage has been observed for device geometry. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. As a result to observe the breakdown voltage, the smaller channel length and the higher doping concentration become, the smaller the breakdown voltage becomes. Also we have observed the change od the breakdown voltage for gate oxide thickness and channel thickness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1475-1482
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• 2009

In this paper, a computer simulation is developed for isotachophoretic protein separation in a serpentine micro channel for optimal lab on a chip design using 2D Finite Element Method. This 2D ITP model is composed of 5 components such as hydrochloric acid as Leader, caproic acid as terminator, acetic acid and benzoic acid as two proteins, and histindine as background electrolyte. The computer model is based on mass conservation equation for 5 components, charge conservation equation for electric potential, and electro neutrality condition for pH calculation. For the validation of the 2D spatial ITP model, the results are compared with the Simul5 developed by Bohuslav Gas Group. The simulation results are in a good agreement in a ID planar channel. This proves the precision of our model. The 2Dproteinseparation is conducted in a 2D curved channel for Lab on a chip design and dispersions of proteins are revealed during the electrophoretic process in a curved shape.

• Journal of the Korean Solar Energy Society
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• v.37 no.4
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• pp.23-33
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• 2017

A great deal of study for loss reduction of photovoltaic system is conducted currently. It is hard to distinct the fault of photovoltaic system with the naked eye. For that reason, it is essential to repair and maintain the PV system by monitoring the system. The fault of individual modules can cause the huge loss of the entire system because of the mismatch. Therefore, the method of diagnosing the PV array is necessary by measuring the multi-channel arrays simultaneously. In this paper, it is presented the method of measuring I-V curve of multi-channel arrays simultaneously by using the charge and discharge characteristics of capacitor. Generated DC power at PV arrays is charged and discharged at the capacitors in a moment. By measuring the charged voltage and current, it is possible to diagnose of performance of PV arrays.

• Journal of Sensor Science and Technology
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• v.30 no.2
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• pp.114-118
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• 2021

In this study, the sensitivity of an active pixel sensor (APS) was adjusted by employing a gate/body-tied (GBT) p-channel metal-oxide semiconductor field-effect transistor (PMOSFET)-type photodetector with a transfer gate. A GBT PMOSFET-type photodetector can amplify the photocurrent generated by light. Consequently, APSs that incorporate GBT PMOSFET-type photodetectors are more sensitive than those APSs that are based on p-n junctions. In this study, a transfer gate was added to the conventional GBT PMOSFET-type photodetector. Such a photodetector can adjust the sensitivity of the APS by controlling the amount of charge transmitted from the drain to the floating diffusion node according to the voltage of the transfer gate. The results obtained from conducted simulations and measurements corroborate that, the sensitivity of an APS, which incorporates a GBT PMOSFET-type photodetector with a built-in transfer gate, can be adjusted according to the voltage of the transfer gate. Furthermore, the chip was fabricated by employing the standard 0.35 ㎛ complementary metal-oxide semiconductor (CMOS) technology, and the variable sensitivity of the APS was thereby experimentally verified.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.37-43
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• 2008

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program/erase (P/E) speed, reliability of memory device on interface trap between Si substrate and tunneling oxide and bulk trap in nitride layer were investigated using charge pumping method which has advantage of simple and versatile technique. We analyzed different SANOS memory devices that were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SANOS cell transistors with larger capture cross section and interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. The data retention was deteriorated as increasing P/E cycling number but not coincides with interface trap increasing tendency. This result once again confirmed that interface trap independence on data retention. And the result on different program method shows that HCI program method more degraded by locally trapping. So, we know as a result of experiment that analysis the SANOS Flash memory characteristic using charge pumping method reflect the device performance related to interface and bulk trap.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.23 no.6
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• pp.449-469
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• 2011

This article reviews the papers published in the Korean Journal of Air-Conditioning and Refrigerating Engineering during 2010. It is intended to understand the status of current research in the areas of heating, cooling, ventilation, sanitation, and indoor environments of buildings and plant facilities. Conclusions are as follows. (1) Research trends of thermal and fluid engineering have been surveyed as groups of general thermal and fluid flow, fluid machinery, and new and renewable energy. Various topics were presented in the field of general thermal and fluid flow. Research issues mainly focused on the thermal reliability of axial fan and compressor in the field of fluid machinery. Studies on the design of ground source heat pump systems and solar chemical reactors were executed in the field of new and renewable energy. (2) Research works on heat transfer area have been reviewed in the categories of heat transfer characteristics and industrial heat exchangers. Researches on heat transfer characteristics included heat transfer in thermoelectric cooling/power generation systems, combined heat and power systems, carbon nano fluid with PVP, channel filled with metal foam and smoke ventilation in a rescue station of a railroad tunnel. Also the studies on flow boiling of R123/oil mixture in a plain tube bundle and R410A charge amount in an air cooled mini-channel condenser were reported. In the area of industrial heat exchangers, researches on plate heat exchanger, shell and tube heat exchanger, enthalpy exchanger, micro channel PCHE were performed. (2) Research works on heat transfer area have been reviewed in the categories of heat transfer characteristics and industrial heat exchangers. Researches on heat transfer characteristics included heat transfer in thermoelectric cooling/power generation systems, combined heat and power systems, carbon nano fluid with PVP, channel filled with metal foam and smoke ventilation in a rescue station of a railroad tunnel. Also the studies on flow boiling of R123/oil mixture in a plain tube bundle and R410A charge amount in an air cooled mini-channel condenser were reported. In the area of industrial heat exchangers, researches on plate heat exchanger, shell and tube heat exchanger, enthalpy exchanger, micro channel PCHE were performed. (3) Refrigeration systems with alternative refrigerants such as hydrocarbons, mixed refrigerants, and CO2 were studied. Performance improvement of refrigeration systems are tried applying various ideas of refrigerant subcooling, dual evaporator with hot gas bypass control and feedforward control. The hybrid solar systems combining the solar collection devices with absorption chillers or compression heat pumps are simulated and studied experimentally as well to improve the understanding and the feasibility for actual applications. (4) Research trend in the field of mechanical building facilities has been found to be mainly focused on field applications rather than performance improvements. Various studies on heating and cooling systems, HVAC facilities, indoor air environments and energy resources were carried to improve the maintenance and management of building service equipments. In the field of heating and cooling systems, papers on a transformer cooling system, a combined heat and power, a slab thermal storage and a heat pump were reported. In the field of HVAC facilities, papers on a cooling load, an ondol and a drying were presented. Also, studies on HVAC systems using unutilized indoor air environments and energy resources such as air curtains, bioviolence, cleanrooms, ventilation, district heating, landfill gas were studied. (5) In the field of architectural environment and energy, studies of various purposes were conducted such as indoor environment, building energy, renewable energy and green building. In particular, renewable energy and building energy-related researches have mainly been studied reflecting the global interest. In addition, many researches which related the domestic green building certification of school building were performed to improve the indoor environment of school.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.53-53
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• 2009

Charge trap flash memory devices with modified tunneling barriers were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were used as engineered tunneling barriers. The VARIOT type tunneling barrier composed of oxide-nitride-oxide (ONO) layers revealed reliable electrical characteristics; long retention time and superior endurance. On the other hand, the CRESTED tunneling barrier composed of nitride-oxide-nitride (NON) layers showed degraded retention and endurance characteristics. It is found that the degradation of NON barrier is associated with the increase of interface state density at tunneling barrier/silicon channel by programming and erasing (P/E) stress.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.327-330
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• 2004

It is shown that the hot carrier degradation due to enhanced hot holes trapping dominates PMOSFETs lifetime both in thin and thick devices. Moreover, it is found that in 0.13 ${\mu}m$ CMOSFET the PMOS lifetime under CHC (Channel Hot Carrier) stress is lower than the NMOSFET lifetime under DAHC (Drain Avalanche Hot Carrier) stress. Therefore. the interface trap generation due to enhanced hot hole injection will become a dominant degradation factor. In case of thick MOSFET, the degradation by hot carrier is confirmed using charge pumping current method and highly necessary to enhance overall device lifetime or circuit lifetime in upcoming nano-scale CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.537-542
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• 2014

The three-dimensional (3-D) NAND flash structure with fully charge storage using edge fringing field effect is presented, and its programming characteristic is evaluated. We successfully confirmed that this structure using fringing field effect provides good program characteristics showing sufficient threshold voltage ($V_T$) margin by technology computer-aided design (TCAD) simulation. From the simulation results, we expect that program speed characteristics of proposed structure have competitive compared to other 3D NAND flash structure. Moreover, it is estimated that this structural feature using edge fringing field effect gives better design scalability compared to the conventional 3D NAND flash structures by scaling of the hole size for the vertical channel. As a result, the proposed structure is one of the candidates of Terabit 3D vertical NAND flash cell with lower bit cost and design scalability.

• Proceedings of the KIEE Conference
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• 1990.11a
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• pp.88-92
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• 1990

An accurate analytical threshold model is presented for fully depleted SOI which has a Metal-Insulator-Semiconductor-Insulator-Metal structure. The threshold voltage is defined as the gate voltage at which the second derivative of the inversion charge with respect to the gate voltage is maximum. Therefore the model is self-consistent with the measurement scheme. Numerical simulations show good agreement with the model with less than 3% error.