• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.54-58
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• 2002

This paper describes the theoretical analysis and performance of a 2.4㎓ bulk-driven downconversion mixer, where the LO signal is input via the bulk. A mixer core designed with a 0.18$\mu\textrm{m}$ CMOS process is able to operate under 0.8V∼1V supply voltage. The RF, LO, and IF port frequencies are 2.45㎓, 2.4㎓, and 50MHz, respectively. The measurement results exhibit conversion gain of -1.8㏈, l㏈ compression point of -17㏈m and IIP3 of -4㏈m with 0㏈m LO power. The power consumption is as small as 4mW.

• Proceedings of the KSR Conference
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• 2005.05a
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• pp.269-273
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• 2005

Since adding design elements to train manufacturing technologies creates addition of high value, it is necessary to develop design for FRT with increased convenience of transportation by rail, which is a new paradigm. Therefore, an evaluation model for increasing convenience of the interior of FRT should draw the requirements of such design and their importance and supply logical basis for setting standards of establishing convenience of system and evaluating and measuring them. In order to evaluate design elements such as interior layout and arrangement of facilities, the model, of which commonness and subjectivity have been verified, should be presented. In consequence, this study going to more concretely focus on new values and sensitive technologies, application of availability and visual communication.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.11
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• pp.152-161
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• 1996

This paper descrisbes the implementation of a 20D DCT that can be used for video conference, JPEG, and MPEG-related applications. The implemented DCT consists of two 1-D DCTs and a transposed memory between them, and uses ROM-based multipliers instead of conventional ones. As the system bit length, the minimum bit length that satisfies the accuracy specified by the ITU standard H.261 was chosen through the simulations using the C language. The proposed design uses a dual port RAM for the transposed memory, and processes two bits of input-pixel data simultaneously t ospeed up addition process using two sets of ROMs. The basic system architecture was designed using th Synopsys schematic editor, and internal modules were described in VHDL and synthesized to logic level after simulation. Then, the compass silicon compiler was used to create the final lyout with 0.8um CMOS libraries, using the standard cell approach. The final layout contains about 110, 000 transistors and has a die area of 4.68mm * 4.96mm, and the system has the processing speed of about 50M pixels/sec.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.6B
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• pp.848-855
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• 2001

본 논문에서는 GHz 대역의 고속 클럭 신호를 필요로 하는 데이터 통신 시스템 분야에 응용될 수 있는 새로운 구조의 클럭 및 데이터 복원회로를 제안하였다. 제안된 회로는 고속의 데이터 전송시 주로 사용되는 NRZ 형태의 데이터 복원에 적합한 구조로서 NRZ 데이터가 주입될 경우에 위상동기 회로에 발생하는 주요 잡음원인인 high frequency jitter를 방지하기 위한 새로운 위상 검출구조를 갖추고 있어서 보다 안정적인 클럭을 제공할 수 있다. 또 가변적인 지연시간을 갖는 delay cell을 이용한 위상검출기를 제안하여 위상 검출기가 갖는 dead zone 문제를 없애고, 항상 최적의 동작을 수행하여 빠른 동기 시간을 갖도록 하였다. Gbps급 대용량의 데이터를 복원하기 위한 클럭 생성을 목표로 하여 CMOS 0.25$\mu\textrm{m}$ 공정을 사용하여 설계한 후 그 동작을 HSPICE post-layout simulation을 통해 검증하였다.

• Proceedings of the Safety Management and Science Conference
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• 2008.04a
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• pp.489-503
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• 2008

This study was various sensitive to a customer requirement and sensitive to the market environment of cosmetics with the manufacture company the low. Consequently we arrange the making line properly and are there even though we make a productivity enhance with the personnel expenses reduction to the quality enhance. We do the supplementation with existing U-line the defect of Cell-line of the making method. We try we substitute and to present the improvement direction to apply at the characteristic of the making company so that we are soft.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.146-149
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• 2003

In this Work, we have studied about an RSFQ 2$\times$2 crossbar switch. The circuit was designed, simulated, and laid out for mask fabrication The switch cell was composed of a splitter a confluence buffer, and a switch core. An RSFQ 2$\times$2 crossbar switch was composed of 4 switch cells, a switch control input to select the cross and bar, data input, and data outputs. When a pulse was input to the switch control input to select the cross or bar the route of the input data was determined, and the data was output at the proper output port. We simulated and optimized the switch-element circuit and 2$\times$2 crossbar switch, by using Xic and Julia. We also performed the mask layout of the circuit by using Xic and Lmeter.

• International Journal of Internet, Broadcasting and Communication
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• v.10 no.3
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• pp.104-108
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• 2018

Lithium-ion batteries have been used in energy storage systems (ESS), electric vehicles (EVs), etc. due to their high safety, fast charging and long lifecycle. This paper aims to improve the convenience of users by changing the wired battery stack used in the battery pack, wirelessly using RFID, reducing the internal volume of the battery pack, reducing the size of the battery pack. In this paper, we propose a battery management system which can provide the flexibility of battery pack expansion and maintenance by using lithium ion battery, battery management system (BMS) and wireless communication for light weight of 1Kw small battery pack. Also, by flexibly arranging the cell layout inside the battery pack and designing to reduce the size of the outer shape of the battery pack.

• Journal of the Institute of Convergence Signal Processing
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• v.4 no.3
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• pp.61-67
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• 2003

We propose a systolic array for dynamic programming which is a technique for solving combinatorial optimization problems. We derive a systolic array for single source shortest path Problem, SA SSSP, and then show that the systolic array serves as dynamic Programming systolic array which is applicable to any dynamic programming problem by developing a systolic array for 0 1 knapsack problem, SA 01KS, with SA SSSP for a basis. In this paper, each of SA SSSP and SA 01KS is modeled and simulated in RT level using VHDL, then synthesized to a schematic and finally implemented to a layout using the cell library based on 0.35${\mu}{\textrm}{m}$ 1 poly 4 metal CMOS technology.

• ETRI Journal
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• v.45 no.3
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• pp.534-542
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• 2023

The large amount of secondary effects in complementary metal-oxide-semiconductor technology limits its application in the ultra-nanoscale region. Circuit designers explore a new technology for the ultra-nanoscale region, which is the quantum-dot cellular automata (QCA). Low-energy dissipation, high speed, and area efficiency are the key features of the QCA technology. This research proposes a novel, low-complexity, QCA-based one-bit digital comparator circuit for the ultra-nanoscale region. The performance of the proposed comparator circuit is presented in detail in this paper and compared with that of existing designs. The proposed QCA structure for the comparator circuit only consists of 19 QCA cells with two clock phases. QCA Designer-E and QCA Pro tools are applied to estimate the total energy dissipation. The proposed comparator saves 24.00% QCA cells, 25.00% cell area, 37.50% layout cost, and 78.11% energy dissipation compared with the best reported similar design.

• ETRI Journal
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• v.44 no.1
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• pp.125-134
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• 2022

Visible light communication (VLC) systems incorporate ambient lighting and wireless data transmission, and the experienced channel in indoor VLC is a major topic that should be examined for reliable communication. In this study, it is realized that multiple transmitters in classical alignment are the forceful factors for channel characteristics. In the frequency band, fluctuations with sudden drops are observed, where the fluctuation shape is related to the source layout and receiver location. These varying frequency-selective channels need solutions, especially for mobile users, because sustained channel estimation and equalization are necessary as the receiver changes its location. It is proven that using light-emitting diodes (LEDs) with highly directional beams as sources or using a detector with a narrow field of view (FOV) in the receiver may help partially alleviate the problem; the frequency selectivity of the channel reduces in some regions of the room. For flat fading channel characteristics all over the room, LEDs should be aligned in hexagonal cellular structure, and detector FOV should be arranged according to the cell dimension outcomes.