• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.11
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• pp.27-32
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• 1999

Metal-ferroelectric-semiconductor devices by susing rapid thermal annealed $LiNbO_3/Si$(100) structures were fabricated and demonstrated nonvolatile memory operations. The estimated field-effect electron mobility and transconductance on a linear region of the fabricated FET were about $600cm^2/V{\cdot}s$ and 0.16mS/mm, respectively. The ID-VG characteristics of MFSFET's showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3 films. The drain current of the on state was more than 4 orders of magnitude larger than the off state current at the same read gate voltage of 0.5V, which means the memory operation of the MFSFET. A write voltage as low as ${\pm}3V$, which is applicable to low power integrated circuits, was used for polarization reversal. The ferroelectric capacitors showed no polarization degradation up to $10^{10}$ switching cycles with the application of symmetric bipolar voltage pulse (peak-to-peak 6V, 50% duty cycle) of 500kHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.9
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• pp.814-820
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• 2015

In this paper, A high selective dual-band bandpass filter was proposed using a dual-mode ring resonator with two short-circuited stubs. For dual-mode resonance, the ring resonator is directly connected with non-orthogonal feed-lines via coupling capacitors. Two short-circuited stubs which are unequal lengths are simultaneously placed at two corners along the two symmetry plane of the ring resonator in order to obtain dual-band responses. Because the feeding angle perturbated ring resonator of the proposed dual-band bandpass filter has the symmetrical structure, Even/Odd mode analysis can be well applied to extract the scattering parameters and transmission zero frequencies. The proposed dual-band bandpass filter was designed and fabricated for WLAN(Wireless Local Area Network) application of IEEE 802.11n standard. The measured results showed a good agreement with the simulation results, and it should be well applied not only for WLAN applications but also for any other communication systems.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.1
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• pp.7-12
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• 2011

This paper proposes a differential Colpitts-VCO circuit suitable for low phase noise oscillation at the sub-1V supply voltage. Oscillation with low phase noise at the sub-1V supply voltage is facilitated by employing inductors as the current sources of the proposed circuit. One of the two feedback capacitors of the single-ended Colpitts oscillator in the proposed circuit is replaced with the MOS varactor in order to further reduce the resonator loss. Post-layout simulation results using a $0.18{\mu}m$ RF CMOS technology show that the phase noises at the 1MHz offset frequency of the proposed circuit oscillating at the sub-1V supply voltages of 0.6 to 0.9 V are at least 7 dBc/Hz lower than those of the well-known cross-coupled differential VCO.

• Journal of IKEEE
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• v.17 no.3
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• pp.234-240
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• 2013

This paper presents an incremental delta-sigma analog-to-digital converter (ADC) for a single-electrode capacitive touch sensor. The second-order cascade of integrators with distributed feedback (CIFB) delta-sigma modulator with 1-bit quantization was fabricated by a $0.18-{\mu}m$ CMOS process. In order to achieve a wide input range in this incremental delta-sigma analog-to-digital converter, the shielding signal and the digitally controlled offset capacitors are used in front of a converter. This circuit operated at a supply voltage of 2.6 V to 3.7 V, and is suitable for single-electrode capacitive touch sensor for ${\pm}10-pF$ input range with sub-fF resolution.

• Journal of the Korean Institute of Telematics and Electronics
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• v.8 no.2
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• pp.24-33
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• 1971

A noble method of delta modulation by means of pair transistor circuit having negative resistance charcteristic is presented. An RC parallel circuit is inserted between two eiuitter tarminals of the pair transistor circuit, and their emitters are driven by a square pulsed current source. Basically this is a relaxation oscillator circuit. But when the value of capacitors and resistanc R, and the pulse height of driving source are properly chosen, the RC parallel circuit apparently functions as integrating circuit of driviving pulses. Compared with the integrated voltage of capacitor C, a signal input voltatage supplied in series with RC parallel circuit between two emitters makes on or off either of the pair transistors. as the result, one bit pulse is sent out from the coupling resistance terminal of conducted transistor. The circuit diagram used for this experiment is presented, it i% composed with simple mod ulster circuit, differential amplifier and pulse shaping amplifier, The characteristics of the components of this ciruit are discussed, and especially quantumized noise in this delta modulation system is discussed in order to improve the signal to noise ratio which has a close relation with circut constants, quantumized voltage, pulse height and width of driving current source.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.15-22
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• 2004

This paper presents the channel analysis considering power distribution network(PDN) system of PCB. For achieve the target PDN system we proposed the useful design approach for acquiring the characteristic target of power distribution network in overall frequency ranges. The proposed method is based on the hierarchical approach related to frequency ranges and the path-based equivalent circuit model to consider the interference of the current paths between the decoupling capacitors and the board through it is a lumped model for fast and easy calculation, experimental results show that the proposed model is almost as precise as the numerical analysis. The analysis of PDN system shows that although the effective inductance of package dominatly affects the power noise and the signal transfer through data channel, the board PDNs also can not be neglected for achieving the accurate channel signaling. Therefore, we must design concurrently the chip, package, and board from the initial spec design of high speed digital system.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.5
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• pp.43-50
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• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage -doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A high input power factor of 97[%] and an efficiency of 98[%] are also obtained. The harmonic guide lines of proposed rectifier is no interfered with inverter switching, resulting in a simple, reliable and low-cost ac-to dc converters in comparison with the boost-type current-improving circuits.It compared conventional pulse-widthmodulated(PWM)inverter with half pulse-widthmodulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switchingloss and holding over-shooting.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.49-58
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• 1999

This paper describes an integrated low pass filter fabricated by using $0.8{\mu}m$ single poly CMOS ASIC technology. The filter has been designed for a 5th-order elliptic switched capacitor filter with cutoff frequency of 5khz, 0.1dB passband ripple. The filter consists of MOS swiches poly capacitors and five CMOS op-amps. For the realization of the SC filter, continuous time transfer function H(s) is obtained from LC passive type, and transfered as discrete time transfer H(z) through bilinear-z transform. Another filter has been designed by capacitor scaling for reduced chip area, considering dynamic range of the op-amp. The test results of two fabricated filters are cutoff frequency of 4.96~4.98khz, 35~38dB gain attenuation and 0.72~0.81dB passband ripple with the ${\pm}2.5V$power supply clock of 50KHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.4
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• pp.20-26
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• 2016

A wireless passive sensor network is a network which, by letting RF sources supply energy to sensor nodes, is - at least theoretically - able to live an eternal life without batteries. Due to the technological immaturity, however, a wireless passive sensor network still has many difficulties; energy scarcity, non-simultaneity of energy reception and data transmission and inefficiency in data transmission occurring at sensor nodes. Considering such practical constraints, in this paper, we propose an elementary MAC scheme supporting many sensor nodes to deliver packets to a sink node. Based on a time structure in which a charging interval for charging capacitors by using received and an acting interval for communicating with a sink node are alternately repeated, the proposed MAC scheme delivers packets to a sink node according to slotted ALOHA. In general, a contention-type scheme tends to exhibit relatively low throughput. Thus, we multilaterally evaluate the throughput performance achieved by the proposed MAC scheme using a simulation method. Simulation results show that the network-wide throughput performance can be enhanced by properly setting the length of acting interval.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.58-65
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• 2009

In this paper, we designed high voltage gate drive IC including dead time circuit in which capacitors controlled rising time and falling time, and schimitt-triggers controlled switching voltage. Designed High voltage gate drive IC improves an efficiency of half-bridge converter by decreasing dead time variation against temperature and has variable dead time by the capacitor value. and its power dissipation, which is generated on high side part level shifter, has decreased 52 percent by short pulse generation circuit, and UVLO circuit is designed to prevent false-operation. We simulated by using Spectre of Cadence to verify the proposed circuit and fabricated in a 1.0um process.