• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.315-316
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• 2019

This paper proposes the operation scheme and control method for a four-level hybrid half-bridge flying-capacitor inverter (4L-HHBFCI). With in-phase disposition level-shifted modulation (IPD), the flying capacitor voltage ripple is less than 1% of the reference value, while the line-to-line voltage total harmonic distortion is 23.27% at unity modulation index. The performance and effectiveness of the proposed inverter operation have been verified by simulation results.

• Proceedings of the KIPE Conference
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• 1997.07a
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• pp.243-246
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• 1997

In this paper, soft switching high power factor buck converter is proposed. This converter is composed of diode rectifier, a input capacitor can be small enough to filter input capacitor can be small enough to filter input current, buck converter with loss less snubber circuit. Converter is operated in discontinous conduction mode, turn of of the switching device is a zero current switching(ZCS) and high power factor input is obtained. In addition, zero voltage switching(ZVS) at turn of is achieved and switching loss is reduced using loss less snubber circuit. The capacitor used in the snubber circuit raised output voltage. Therefore, proposed converter has higher output voltage and higher efficiency than conventional buck type converter at same duty factor in discontious conduction mode operation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.1
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• pp.71-80
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• 2015

LDO(Low Drop-Out) regulators have become an essential building block in modern PMIC(Power Managment IC) to extend battery life of electronic devices. In this paper, we optimize capacitor-less LDO regulator via Geometric Programming(GP) designed using Dongbu HiTek $0.5{\mu}m$ BCDMOS process. GP-compatible models for stability and PSR of LDO regulators are derived based on monomial formulation of transistor characteristics. Average errors between simulation and the proposed model are 9.3 % and 13.1 %, for phase margin and PSR, respectively. Based on the proposed models, the capacitor-less LDO optimization can be performed by changing the PSR constraint of the design. The GP-compatible performance models developed in this work enables the design automation of capacitor-less LDO regulator for different design target specification.

• Journal of Power Electronics
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• v.18 no.2
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• pp.432-444
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• 2018

This paper presents a capacitor voltage balancing topology using a three-level boost converter (TLBC) for a neutral point clamped (NPC) three-level inverter fed surface permanent magnet synchronous motor drive (SPMSM). It enhanced the performance of the drive in terms of its voltage THD and torque pulsation. The main attracting feature of the proposed control is the boosting of the input voltage and at the same time the balancing of the capacitor voltages. This control also reduces the computational complexity. For the purpose of close loop vector control, a software based cost effective resolver to digital converter RDC-less estimation is implemented to calculate the speed and position. The proposed drive is simulated in the MATLAB/SIMULINK environment and an experimental investigation using dSPACE DS1104 validates the proposed drive system at different operating condition.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.3
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• pp.185-192
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• 2017

This paper proposes a single-stage interleaved soft-switching electrolytic capacitor-less EV charger with reduced component count and simple circuit structure. The proposed charger achieves ZVS turn-on of all switches and ZCS turn-off of all diodes without regard to voltage and load variation. It achieves high power density even without an input filter due to CCM operation and bulky electrolytic capacitors and without a low-frequency component in the transformer. A 2 kW prototype of the proposed charger with sinusoidal charging is built and tested to verify the validity of the proposed operation.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.4 no.3 s.8
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• pp.73-78
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• 2005

In this paper, a bandpass filter with excellent cut off characteristic due to transmission zero using bypass coupling capacitor and with superior harmonic characteristic by interdigital capacitor is suggested. The measurement results for SIR bandpass filter with bypass coupling capacitor and interdigital capacitor show that the insertion loss is less than 1.9 dB and the return loss is better than 15.4 dB with 4.2 % bandwidth at the center frequency of 5.78 GHz.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.6
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• pp.77-84
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• 1997

buck type converter doesn't appear when an input voltag eis lower than an output voltage. This is the main reason the buck converter has not been used for high power factor converters. In this paper, soft switching high power factor buck converter is proposed. This converter is composed of diode rectifier, input capacitor can be small enough to filter input current, buck converter with loss less snubber circuit. Converter is operated in discontinous conduction mode, turn on of the switching device is a zero current switching (ZCS) and high powr factor input is obtianed. In addition, zero voltage switching (ZVS) at trun off is achieved and switching loss is reduced using loss less snubber circuit. The capacitor used in the snubber circuit raised output voltage. Therefore, proposed converter has higher output voltage and higher efficiency than conventional buck type converter at same duty factor in discontinous conduction mode operation. High power factro, efficiency, soft switching operation of proposed converter is veified by simulation using Pspice and experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.202-207
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• 2015

A CMOS relaxation oscillator, with high robustness over process, voltage and temperature (PVT) variations, is designed in $0.18{\mu}m$ CMOS. The proposed oscillator, consisting of full-differential charge-discharge timing circuit and switched-capacitor based voltage-to-current conversion, could be expanded to a simple open-loop frequency synthesizer (FS) with output frequency digitally tuned. Experimental results show that the proposed oscillator conducts subcarrier generation for frequency-modulated ultra-wideband (FM-UWB) transmitters with triangular amplitude distortion less than 1%, and achieves frequency deviation less than 8% under PVT and phase noise of -112 dBc/Hz at 1 MHz offset frequency. Under oscillation frequency of 10.5 MHz, the presented design has the relative FS error less than 2% for subcarrier generation and the power dissipation of 0.6 mW from a 1.8 V supply.

• Journal of the Korean Electrochemical Society
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• v.3 no.4
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• pp.241-245
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• 2000

The objective of this work Is to design, fabricate, and characterize pseudo-capacitor using amorphous $MnO_2\;nH_2O$ electrode material. The cyclic voltammogram under 100mV/s scan rate of the material shows the electrochemically stable potential window of 1V and the specific capacitance of 250F/g. The TDMA pulse test result indicates that the TDMA system (2 parallel-pseudo-capacitor systems) has the ohmic voltage drop of 0.22V and the capacitor voltage drop of 0.38V. The total voltage drop of the TDMA system is 0.60V and less than 1V of which value is the maximum voltage drop requirement or the TDMA satellite phone. Also, the TDMA system had the ESR of $55m{\Omega}$ and the capacitance of 105mF. Therefore, it is confirmed that the TDMA system has the application feasibility as load-leveling capacitor for the satellite phone.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.12
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• pp.584-590
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• 2002

Crowbar system is usually applied to a pulsed power system in which a capacitor bank is discharged into a load. This provides a free wheeling path for the load current and prevents the capacitor from recharging due to a reverse voltage. Usually diodes have been used as a crowbar switch, but it is not a practical system because the cost of the diodes goes up enormously with increasing the system voltage and current. This paper presents a novel protection scheme of a charging and discharging system of a 300 kJ capacitor bank using a low-cost crowbar system which consists of a crowbar switch and resistors. Triggered vacuum switch(TVS) was used for a crowbar switch, and Rogowski coil was used to determine a trigger time of TVS. When this crowbar system is applied to our pulsed power system which consists of capacitor bank($123muF$), inductor() for forming a pulse, load resistor$(100 m\Omega)$, and a closing switch, instantaneous reversal voltage of capacitor bank could be limited less than 1.8 ㎸ until capacitor bank was charred to 17 ㎸.