• Title/Summary/Keyword: Capacitor voltage stress

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Analysis for Thermal Distribution of Low-voltage Condenser by the Variance of Voltage & Frequency (전압 및 주파수 변화에 따른 저압 콘덴서 열 분포 해석)

  • Kim, Jong-Gyeum
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.4
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    • pp.43-49
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    • 2010
  • Power capacitor has been used to compensate for the low power factor of inductive load and to reduce harmonics generated by the power conversion device with reactor. The increase of voltage and current and thermal generation are extremely hard on the life of condenser. Current will be increased, provided that voltage and frequency of condenser increase also. The increase of voltage and frequency justly extends thermal generation. Both act on insulation stress and can afford to premature fault In this paper, we measured thermal distribution of condenser with infrared rays camera in case of variance of voltage and frequency. We were assured that the increase of voltage and frequency produces high heat and exceedingly shortens the life of condenser.

A New Multi Level High Gain Boost DC-DC Converter with Wide Input Voltage Range and Reduced Stress Voltage Capability (넓은 입력 전압 범위와 감소된 스트레스 전압 기능성을 갖는 새로운 승압형 멀티레벨 DC-DC 컨버터)

  • Anvar, Ibadullaev;Park, Sung-Jun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.2
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    • pp.133-141
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    • 2020
  • The use of high-gain-voltage step-up converters for distributed power generation systems is being popularized because of the need for new energy generation and power conversion technologies. In this study, a new constructed high-gain-boost DC-DC converter was proposed to coordinate low voltage output DC sources, such as PV or fuel cell systems, with high DC bus (380 V) lines. Compared with traditional boost DC-DC converters, the proposed converter can create higher gain and has wider input voltage range and lower voltage stress for power semiconductors and passive elements. Moreover, the proposed topology produces multilevel DC voltage output, which is the main advantage of the proposed topology. Steady-state analysis in continuous conduction mode of the proposed converter is discussed in detail. The practicability of the proposed DC-DC converter is presented by experimental results with a 300 W prototype converter.

Characterization of Dielectric Relaxation and Reliability of High-k MIM Capacitor Under Constant Voltage Stress

  • Kwak, Ho-Young;Kwon, Sung-Kyu;Kwon, Hyuk-Min;Sung, Seung-Yong;Lim, Su;Kim, Choul-Young;Lee, Ga-Won;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.543-548
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    • 2014
  • In this paper, the dielectric relaxation and reliability of high capacitance density metal-insulator-metal (MIM) capacitors using $Al_2O_3-HfO_2-Al_2O_3$ and $SiO_2-HfO_2-SiO_2$ sandwiched structure under constant voltage stress (CVS) are characterized. These results indicate that although the multilayer MIM capacitor provides high capacitance density and low dissipation factor at room temperature, it induces greater dielectric relaxation level (in ppm). It is also shown that dielectric relaxation increases and leakage current decreases as functions of stress time under CVS, because of the charge trapping effect in the high-k dielectric.

A new interleaved high step up converter with low voltage stress on the main switches

  • Tohidi, Babak;Delshad, Majid;Saghafi, Hadi
    • Smart Structures and Systems
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    • v.26 no.4
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    • pp.521-531
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    • 2020
  • In this paper, a new interleaved high step-up converter with low voltage stress on the switches is proposed. In the proposed converter, soft switching is provided for all switches by just one auxiliary switch, which decreases the conduction loss of auxiliary circuit. Also, the auxiliary circuit is expanded on the converter with more input branches. In the converter all main switches operate under zero voltage switching condition and auxiliary switch operate under zero current switching condition. Because of the interleaved structure, the reliability of converter increases and input current ripples decreases. The clamp capacitor in the converter not only absorb the voltage spikes across the switch due to leakage inductance, but also improve voltage gain. The proposed converter is fully analyzed and to verify the theoretical analysis, a 100 W prototype was implemented. Also, to show the effectiveness of auxiliary circuit on conduction EMI, EMI of the proposed converter comprised with hard switching counterpart.

The Study of Reliability by SILC Characteristics in Silicon Oxides (SILC 특성에 의한 실리콘 산화막의 신뢰성 연구)

  • 강창수
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.17-20
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    • 2002
  • This study has been investigated that traps generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The charge state of the traps can easily be changed by application of low voltages after the stress high voltage. These trap generation involve either electron impact ionization processes or high field generation processes. It determined to the relative traps locations inside the oxides ranges from 113.4A to 814A with capacitor areas of 10$^{-3}$ $\textrm{cm}^2$ The oxide charge state of traps generated by the stress high voltage contain either a positive or negative charge.

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Split-Capacitor Dual-Active-Bridge Converter (Split-Capacitor Dual-Active-Bridge 컨버터)

  • Kim, Kisu;Park, Siho;Cha, Honnyong;Choi, Byungcho
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.5
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    • pp.352-358
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    • 2018
  • A split-capacitor (SC) dual-active-bridge (DAB) converter is proposed in this study. The DC-link capacitors of input and output are split in the proposed converter. The primary and secondary windings of transformer are connected to the midpoints of the DC-links. Hence, the SC DAB converter can inherently prevent transformer from saturation. Although the switch current stress of the proposed converter is twice that of the conventional DAB converter, the switch voltage stress is reduced by half. Therefore, the proposed converter can reduce switching loss and achieve high efficiency in a high switching frequency. Given the SC structure, the proposed converter can readily be connected to neutral-point-clamped- or half-bridge-type converters. The topology of the proposed converter is presented and the operating principle is analyzed in detail. A 3-kW hardware prototype was built and tested to verify the performance of the proposed converter.

A Snubber Circuit for Flying Capacitor Multilevel Inverter and Converter (플라잉 커패시터 멀티레벨 인버터 및 컨버터를 위한 스너버 회로)

  • 성현제
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.448-451
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    • 2000
  • This paper proposed a snubber circuit for flying capacitor multilevel inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber as basic snubber unit and has such an advantage of Undeland snubber used in the two-level inverter. Comparing conventional RCD/RLD snubber for multilevel in verter and converter the proposed snubber keeps such a good features as fewer number of components improved efficiency of system due to low loss snubber and reduction of voltage stress of main switching devices due to low overvoltage. Furthermore the proposed concept of constructing a snubber circuit for flying capacitor 3-level inverter and converter can apply to any level of them. In this paper the proposed snubber applies to three-level flying capacitor inverter and demonstrates its feature by computer simulation and experimental result.

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A Snubber Circuit for Flying Capacitor Multilevel Inverter and Converter (플라잉 커패시터 멀티레벨 인버터 및 컨버터를 위한 스너버 회로)

  • Lee, Min-Su;Seong, Hyeon-Je;Kim, In-Dong;No, Ui-Cheol;Jo, Cheol-Je
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.50 no.9
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    • pp.459-466
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    • 2001
  • This paper proposes a snubber circuit for flying capacitor multilevel inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber unit. It has such an advantage of Undeland snubber used in the two-level inverter. Compared with conventional RCD/RLD snubber for multileve1 inverter and converter, the proposed snubber keeps such good features as fewer number of components, reduction of voltage stress of main switching devices due to low overvoltage, and improved efficiency of system due to low loss snubber. In this paper, the proposed snubber is applied to three-level flying capacitor inverter and this feature is demonstrated by computer simulation and experimental result.

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Interleaved ZVS Resonant Converter with a Parallel-Series Connection

  • Lin, Bor-Ren;Shen, Sin-Jhih
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.528-537
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    • 2012
  • This paper presents an interleaved resonant converter with a parallel-series transformer connection in order to achieve ripple current reduction at the output capacitor, zero voltage turn-on for the active switches, zero current turn-off for the rectifier diodes, less voltage stress on the rectifier diodes, and less current stress on the transformer primary windings. The primary windings of the two transformers are connected in parallel in order to share the input current and to reduce the root-mean-square (rms) current on the primary windings. The secondary windings of the two transformers are connected in series in order to ensure that the transformer primary currents are balanced. A full-wave diode rectifier is used at the output side to clamp the voltage stress of the rectifier diode at the output voltage. Two circuit modules are operated with the interleaved PWM scheme so that the input and output ripple currents are reduced. Based on the resonant behavior, all of the active switches are turned on under zero voltage switching (ZVS), and the rectifier diodes are turned off under zero current switching (ZCS) if the operating switching frequency is less than the series resonant frequency. Finally, experiments with a 1kW prototype are described to verify the effectiveness of the proposed converter.

Trap distributions in high voltage stressed silicon oxides (고전계 인가 산화막의 트랩 분포)

  • 강창수
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.9 no.5
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    • pp.521-526
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    • 1999
  • It was investigated that traps were generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The charge state of the traps can easily be changed by application of low voltage after the stress high voltage. It determined to the relative traps locations inside the oxides ranges from 113.4$\AA$to 814$\AA$ with capacitor areas of $10^{-3}{$\mid$textrm}{cm}^2$. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The oxide charge state of traps generated by the stress high voltage contain either a positive or a negative charge.

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