• Journal of Power Electronics
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• 제16권3호
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• pp.832-839
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• 2016

In this study, the performance of a direct current (DC)-DC buck converter is analyzed in the presence of non-idealities in passive components and semiconductor devices. The effect of these non-idealities on the various design issues of a DC-DC buck converter is studied. An improved expression for duty cycle is developed to compensate the losses that occur because of the non-idealities. The design equations for inductor and capacitor calculation are modified based on this improved expression. The effect of the variation in capacitor equivalent series resistance (ESR) on output voltage ripple (OVR) is analyzed in detail. It is observed that the value of required capacitance increases with ESR. However, beyond a maximum value of ESR (r_c,max), the capacitor is unable to maintain OVR within a specified limit. The expression of r_c,max is derived in terms of specified OVR and inductor current ripple. Finally, these theoretical studies are validated through MATLAB simulation and experimental results.

• 전자공학회논문지T
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• 제35T권1호
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• pp.48-58
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• 1998

본 논문은 센서에서 수반되는 기생용량과 온도 드리프트 및 누설전류의 영향을 경감하기 위한 C-V변환회로 및 C-V변환회로에 관한 실험결과를 제시하고, 또한 논문에서 제안한 센싱 주파수를 기준주파수로 나누어줌으로써 상기 영향들을 줄일 수 있는 새로운 인터페이스 회로를 제시한다 이 회로는 용량비의 출력신호를 디지털 방식으로 16진수로 계수 함으로써 신호의 전송이나 컴퓨터 처리가 쉬울 뿐 아니라 비트수의 증가에 따라 분해 능을 향상시킬 수 있는 이점도 있다. 시작한 인터페이스 회로의 C-V 및 C-F 변환회로에서 전원전압 4.0V, 피이드백 커패시턴스10pF, 압력 0∼10 KPa범위에서 감도는 각각 28 ㎷/㎪·V, -6.6 ㎐/㎩로서 양호하였고, 온도 드리프트 특성은 0.051 %F.S./℃ 및 0.078 %F.S./℃로서 크게 개선되었다.

• Journal of Power Electronics
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• 제14권3호
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• pp.413-420
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• 2014

The conventional Phase-Shift Full-Bridge (PSFB) converter has a serious voltage spike because of the ringing between the leakage inductance of the transformer and the parasitic output capacitance of the secondary side rectifier switches. To overcome this problem, an asynchronous active clamp technique employing an auxiliary DC/DC converter has been proposed. However, an exact analyses for designing the auxiliary DC/DC converter has not been presented. Therefore, the amount of power that is supposed to be handled in the auxiliary DC/DC converter is calculated through a precise mode analyses in this paper. In addition, this paper proposes a lossy snubber circuit with hysteresis characteristics to reduce the burden that the auxiliary DC/DC converter should take during the starting interval. This technique results in optimizing the size of the magnetic component of the auxiliary DC/DC converter. The operational principles and the theoretical analyses are validated through experiments with a 48V-to-30V/15A prototype.

• 전기전자학회논문지
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• 제23권2호
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• pp.407-412
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• 2019

LED 조명은 많은 장점으로 인하여 다양한 분야에서 사용이 점점 증가되고 있다. 특히 플라이백 컨버터는 전력밀도와 구조적 단순성 그리고 소형화가 가능하여 많은 컨버터 설계자들에게 LED 조명용 드라이버로 선택되어지고 있다. 또한 컨버터의 직류출력전압을 안정화하기 위하여 저렴한 가격의 정전용량이 큰 전해커패시터를 사용한다. 전해 커패시터를 갖는 전력변환기를 LED 조명시스템에 적용할 경우에 일반적으로 LED의 수명이 짧아지는 결과를 가져온다. 제안하는 논문은 LED 수명연장과 컨버터 출력리플을 감소시키기 위하여 소용량의 필름 커패시터 LC 필터를 컨버터에 적용하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.996-997
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• 2015

This paper proposes parameter design principle of the sub-module capacitance, Arm inductance and a control method to reduced the circulating currents in modular multilevel converter(MMC) under unbalanced voltage conditions. Under balanced voltage conditions, only negative-sequence circulating currents exist. Consequently, the conventional method has considered only negative-sequence circulating currents in MMC. However, under unbalanced voltage conditions, there are positive-sequence, zero-sequence and negative-sequence circulating currents in MMC. Thus, under unbalanced voltage conditions, a control method should consider these all components. This study proposes the control method to reduced the circulating currents under the unbalanced voltage.

• 전기학회논문지
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• 제65권1호
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• pp.88-96
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• 2016

In this paper, the GaN FET based phase-shift full-bridge dc-dc converter design is implemented. Switch characteristics of GaN FET were analyzed in detail by comparing state-of-the-art Si MOSFET. Owing to the low conduction resistance and parasitic capacitance, it is expected to GaN FET based power conversion system has improved performance. However, GaN FET is vulnerable to electric interference due to the relatively low threshold voltage and fast switching transient. Therefore, it is necessary to consider PCB layout to design GaN FET based power system because PCB layout is the main reason of stray inductance. To reduce the electric noise, gate voltage of GaN FET is analyzed according to operation mode of phase-shift full-bridge dc-dc converter. Two 600W phase-shifted full-bridge dc-dc converter are designed based on the result to evaluate effects of stray inductance.

• Journal of Electrical Engineering and Technology
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• 제9권1호
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• pp.143-153
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• 2014

This paper presents a novel application of LCC resonant converter for 60kW EV fast charger and describes development of the high efficiency 60kW EV fast charger. The proposed converter has the advantage of improving the system efficiency especially at the rated load condition because it can reduce the conduction loss by improving the resonance current shape as well as the switching loss by increasing lossless snubber capacitance. Additionally, the simple gate driver circuit suitable for proposed topology is designed. Distinctive features of the proposed converter were analyzed depending on the operation modes and detail design procedure of the 10kW EV fast charger converter module using proposed converter topology were described. The proposed converter and the gate driver were identified through PSpice simulation. The 60kW EV fast charger which generates output voltage ranges from 50V to 500V and maximum 150A of output currents using six parallel operated 10kW converter modules were designed and implemented. Using 60kW fast charger, the charging experiments for three types of high-capacity batteries were performed which have a different charging voltage and current. From the simulation and experimental results, it is verified that the proposed converter topology can be effectively used as main converter topology for EV fast charger.

• 한국조명전기설비학회지:조명전기설비
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• 제10권6호
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• pp.54-61
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• 1996

본 논문에서는 기존에 제시된 영전압 준공진 buck dc-dc 컨버터를 시뮬레이션을 이용하여 분석하고, 이에서 발생하는 문제점을 분석하였다. 그리고 부하저항을 낮게 가변함에 따라 소자의 스트레스가 증가함을 확인하였다. 그 원인이 freewheeling다이오드의 기생 커채시턴스에 의한 전압상승에 의하여 발생함을 확인하고, 이를 개선할수 있는 영전압 스위칭 컨버터를 제시한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.305-308
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• 2002

An 1.8V 6bit IGSPS ADC for high speed data acquisition is discussed in this paper. This ADC is based on a flash ADC architecture because the flash ADC is the only practical architecture at conversion rates of IGSPS and beyond. A straightforward 6bit full flash A/D converter consists of two resistive ladders with 63 laps, 63 comparators and digital blocks. One important source of errors in flash A/D converter is caused by the capacitive feedthrough of the high frequency input signal to the resistive reference-lauder. Consequently. the voltage at each tap of the ladder network can change its nominal DC value. This means large transistors have a large parasitic capacitance. Therefore, a dual resistive ladder with capacitor is employed to fix the DC value. Each resistive ladder generates 32 clean reference voltages which alternates with each other. And a two-stage amplifier is also used to reduce the effect of the capacitive feedthrough by minimizing the size of MOS connected to reference voltage. The proposed ADC is based on 0.18${\mu}{\textrm}{m}$ 1-poly 6-metal n-well CMOS technology, and it consumes 307㎽ at 1.8V power supply.

• 전력전자학회논문지
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• 제3권3호
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• pp.231-239
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• 1998

본 논문에서는 대용량에 적합한 영전압 스위칭 전브리지 PWM 직류/직류 변한기의 동특성 해석과 제어 루프의 설계에 대해 논하였다. 전압을 제어하기 위한 위상전이제어의 효과와 영전압 스위칭을 위한 변압기의 누설인덕턴스, FET의 적합 커패시턴스의 이용효과를 고려한 소신호 모델을 유도하였다. 이 소신호 모델은 PWM 벅 변환기의 등가모델에 시비율 변조에 대한 두 개의 종속 전원을 추가함으로써 모델링할 수 있다. 소신호 해석 결과를 근거로 하여 2-극점, 1-영점 보상회로를 사용한 전압제어기를 설계하였다. 설계된 제어기의 타당성을 검증하기 위해서 개루프 시스템과 폐루프 시스템의 소신호 해석결과를 비교하였으며, 2kW급 부하실험으로 설계한 전압제어기의 동특성이 우수함을 실험적으로 입증하였다.