• Title/Summary/Keyword: Capacitance minimization

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A Study on Optimal Design of Capacitance for Active Power Decoupling Circuits (능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구)

  • Baek, Ki-Ho;Park, Sung-Min;Chung, Gyo-Bum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.3
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    • pp.181-190
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    • 2019
  • Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

Minimization of DC-Link Capacitance for NPC Three-level PWM Converters

  • Alemi, Payam;Lee, Dong-Choon
    • Proceedings of the KIPE Conference
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    • 2011.07a
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    • pp.370-371
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    • 2011
  • This paper presents a control algorithm that minimizes the DC-link capacitance by decreasing the capacitor current. The capacitor current can be nullified by a feedback compensation term which is calculated from the power balance in the AC/DC converter. As a result, voltage variation in the DC-link is reduced further, which makes a large reduction in the size of DC-link capacitors which are expensive and have limitations in life time. Simulations are performed with two 80uF DC-link capacitors, which can be replaced by film capacitors.

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Optimal Design of a-Si TFT Array for Minimization of Data-line Capacitance and Its Implementation (데이터 배선 용량 최소화를 위한 비정질 실리콘 박막 트렌지스터 배열의 최적화 설계와 구현)

  • Kim, C.W.;Yoon, J.K.;Kim, S.Y.;Kim, J.H.
    • Journal of Biomedical Engineering Research
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    • v.29 no.5
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    • pp.392-399
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    • 2008
  • Thin-film transistor (TFT) arrays for an x-ray detector require quite different design concept from that of the conventional active-matrix liquid crystal devices (AM-LCDs). In this paper anew design of TFT array which uses only SiNx for passivation layer is described to meet the detector performance and the product availability simultaneously. For the purpose of optimizing the design parameters of the TFT array, a Spice simulation was performed. As a result, some parameters, such as the TFT width, the data line capacitance, and the storage capacitance, were able to be fixed. The other parameters were decided within a permissible range of the TFT process especially the photolithography process and the wet etch process. Then we adapted the TFT array which had been produced by the proposed design to our prototype model (FDXD-1417 and evaluated it clinically by comparing with a commercial model (EPEX, Hologic, Beford, USA). The results say that our prototype model is slightly better than EPEX system in chest PA images. So we can prove the technical usefulness and the commercial values of the proposed TFT design.

Minimization of Cell Capacitance Voltage Ripple Using Second Order Harmonic Current on Modular Multi-Level Converter (2 고조파 전류를 이용한 Modular Multi-Level Converter의 셀 캐패시터 전압맥동 최소화)

  • Jung, Sungho;Lee, Hak-Jun;Sul, Seung-Ki
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.67-68
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    • 2011
  • 본 논문에서는 Modular Multi-Level Converter(MMLC)의 셀(Cell) 캐패시터(Capacitor) 전압 밸런싱에서 전압맥동 최소화 방법을 제안한다. 암(Arm) 평균 전류를 직류성분으로만 제어 할 경우 기본파 주파수와 2 고조파로 흔들리는 순시전력 항이 셀 캐패시터 전압 맥동을 만든다. 이를 억제 하기위해 암 평균 전류에 2 고조파 교류 성분을 직류성분과 함께 제어하는 방법을 제안한다. 이 방법을 통하여 전압맥동을 줄일 수 있음을 밝히고, 주입되는 2 고조파 전류의 크기와 위상각 계산 방법을 제시한다. 모의실험 결과를 통해 제안된 방법의 유효성을 검증하였다.

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Optimal Cylindrical Capacitive Sensor(CCS) taking into account the Circumferential Gaps between Sensor Electrodes (센서 전극 사이의 간극을 고려한 최적의 정전용량 센서)

  • Ahn, Hyeong-Joon;Park, Jong-Min;Han, Dong-Chul
    • Proceedings of the KSME Conference
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    • 2004.11a
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    • pp.613-618
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    • 2004
  • CCS was developed and applied to rotating machines because of accurately measuring the spindle error motion without significant efforts. However, researches on the CCS have been focused on ideal cases where circumferential gaps were ignored. This paper presents the effects of circumferential gaps and proposes an optimal CCS considering the circumferential gaps. First, electrostatic analysis of the CCS that includes the circumferential gaps is performed using the FEM, and an additional capacitance due to the circumferential gap can be approximated as an equivalent extended sensor length. Second, a mathematical model of the CCS considering the circumferential gaps is derived, and the optimal CCS is determined through minimization of the weighted error amplification factor. Finally, two CCSs, both considering and ignoring the circumferential gaps, are built, and the effectiveness of the optimal design is verified through simulation and experiment.

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A Code Assignment Algorithm for Microinstructions (마이크로 명령어의 코드 할당 알고리즘)

  • Kim, H.R.;Kim, C.S.;Hong, I.S.;Lim, J.Y.;Lim, I.C.
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.587-590
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    • 1988
  • In the case of VLSI computer system control unit design using PLA, optimal state code assignment algorithm to minimize the PLA area is proposed. An optimal state code assignment algorithm which considers output state and logic minimization simultaneously is proposed, and by means of this, algorithm product term is minimized. Also, by means of this algorithm running time and memory capacitance is decreased as against heuristic state code assignment algorithm which uses matrix calculation and considers the constraint relation only. This algorithm is implemented on VAX 11/750 (UNIX4.3BSD). Through the various test example applied proposed algorithm, the efficiency of this algorithm is shown.

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Computer simulation to determine system parameters of the square-wave adapted fast impedance analyzer for the electrode - electrolyte interface analysis (구형파를 이용한 전극계면 분석용 고속 임피던스 분석기의 설계변수 확정을 위한 컴퓨터 시뮬레이션)

  • Kim Gi-Ryon;Kim Gwang-Nyeon;Shim Yoon-Bo;Jeon Gye-Rok;Jung Dong-Keun
    • Journal of the Korea Society for Simulation
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    • v.14 no.2
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    • pp.45-55
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    • 2005
  • There are electric double layer capacitance, polarization resistance and solution resistance in the interface between electrode and solution. Electrode process could be evaluated by the electrical impedance analysis. The necessities of the electrochemical cell analysis with high speed impedance analyzer are followings: minimization of the effects of electric stimulation on electrochemical cell and the concentration of reactive materials, and optimization of impedance signal resolution. This paper represents the design criteria for the selection and stimulation to develop fast impedance analyzer prototype for a electrochemical cell. It was suggested that the design of 470k sample/s sampling rate, 13 bit ABC resolution, and 140ms recording time is required for high speed impedance analysis system in frequency range between dc and 10kHz.

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Development of a novel reconstruction method for two-phase flow CT with improved simulated annealing algorithm

  • Yan, Mingfei;Hu, Huasi;Hu, Guang;Liu, Bin;He, Chao;Yi, Qiang
    • Nuclear Engineering and Technology
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    • v.53 no.4
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    • pp.1304-1310
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    • 2021
  • Two-phase flow, especially gas-liquid two-phase flow, has a wide application in industrial field. The diagnosis of two-phase flow parameters, which directly determine the flow and heat transfer characteristics, plays an important role in providing the design reference and ensuring the security of online operation of two-phase flow system. Computer tomography (CT) is a good way to diagnose such parameters with imaging method. This paper has proposed a novel image reconstruction method for thermal neutron CT of two-phase flow with improved simulated annealing (ISA) algorithm, which makes full use of the prior information of two-phase flow and the advantage of stochastic searching algorithm. The reconstruction results demonstrate that its reconstruction accuracy is much higher than that of the reconstruction algorithm based on weighted total difference minimization with soft-threshold filtering (WTDM-STF). The proposed method can also be applied to other types of two-phase flow CT modalities (such as X(𝛄)-ray, capacitance, resistance and ultrasound).

Radio Frequency Circuit Module BGA(Ball Grid Array) (Radio Frequency 회로 모듈 BGA(Ball Grid Array) 패키지)

  • Kim, Dong-Young;Jung, Tae-Ho;Choi, Soon-Shin;Jee, Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.1
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    • pp.8-18
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    • 2000
  • We presented a BGA(Ball Grid Array) package for RF circuit modules and extracted its electrical parameters. As the frequency of RF system devices increases, the effect of its electrical parasitics in the wireless communication system requires new structure of RF circuit modules because of its needs to be considered of electrical performance for minimization and module mobility. RF circuit modules with BGA packages can provide some advantages such as minimization, shorter circuit routing, and noise improvement by reducing electrical noise affected to analog and digital mixed circuits, etc. We constructed a BGA package of ITS(Intelligent Transportation System) RF module and measured electrical parameters with a TDR(Time Domain Reflectometry) equipment and compared its electrical parasitic parameters with PCB RF circuits. With a BGA substrate of 3${\times}$3 input and output terminals, we have found that self capacitance of BGA solder ball is 68.6fF, and self inductance 146pH, whose values were reduced to 34% and 47% of the value of QFP package structure. S11 parameter measurement with a HP4396B Network Analyzer showed the resonance frequency of 1.55GHz and the loss of 0.26dB. Routing length of the substrate was reduced to 39.8mm. Thus, we may improve electrical performance when we use BGA package structures in the design of RF circuit modules.

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Comparison of Wetting and Drying Characteristics in Differently Textured Soils under Drip Irrigation (점적관개 시 토성별 습윤.건조 특성 비교)

  • Kim, Hak-Jin;Son, Dong-Wook;Hur, Seung-Oh;Roh, Mi-Young;Jung, Ki-Yuol;Park, Jong-Min;Rhee, Joong-Yong;Lee, Dong-Hoon
    • Journal of Bio-Environment Control
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    • v.18 no.4
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    • pp.309-315
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    • 2009
  • Maintenance of adequate soil water content during the period of crop growth is necessary to support optimum plant growth and yields. A better understanding of soil water movement for precision irrigation would allow efficient supply of water to crops, thereby resulting in minimization of water drainage and contamination of ground water. This research reports on the characterization of spatial and temporal variations in water contents through three different textured soils, such as loam, sandy loam, and loamy sand, when water is applied on the soil surface using an one-line drip irrigation system and the soils are dried after the irrigation stops, respectively. Water contents through each soil profile were continuously monitored using three Sentek probes, each consisting of three capacitance sensors at 10, 20, and 30cm depths. Spatial variability in water content for each soil type was strongly influenced by soil textural class. There were big differences in wetting pattern and the rate of downward movement between loam and sandy loam soils, showing that the loam soil had a wider wetting pattern and a slower rate of downward movement than did the sandy loam soil. The wetting pattern in loamy sand soil was not apparent due to a low variability in water content (< 10%) by a lower-water holding capacity as compared to those measured in the loam and sandy loam soils, implying that the rate of water drainage below a depth of 30cm was high. When soils were dried, there were highly exponential relationships between water content and time elapsed after irrigation stops ($r^2$${\geq}$0.98). It was estimated that equilibrium moisture contents for loam, sandy loam, and loamy sand soils would be 17.6%, 6.2%, and 4.2%, respectively.