• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.871-874
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• 1998

A new transmission line parameter extraction method of iC interconnects on silicon substrate is presented. To extract the acurate parameters, the silicon substrate effects were taken into account. Since the electromagnetic fields under the silicon substrate are propagated with slow wave mode, effective dielectric constant and different ground plane with the multi-layer dielectric structures were employed for inductance and capacitance matrix determination. Then accurate signal transients simulation were performed with HSPICE by using the parameters. It was shown that the simulation resutls has an excellent agreement with TDR/TDT measurements.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.763-766
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• 2003

A direct parameter extraction method using several two-port parameter equations derived in cutoff and active bias modes has been studied to obtain an accurate Gummel-Poon BJT model. First, dc model parameters were extracted from slopes and y-axis intercepts of I-V curve and Gummel plot. The pad capacitances and junction capacitance parameters were determined by using measured S-parameter sets in the cutoff bias. The resistance and transit time parameters were extracted by using measured S-parameter sets in the active bias.

• 전자공학회논문지A
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• 제31A권8호
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• pp.46-52
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• 1994

DC and AC current crowding effects for microwave and high speed bipolar transistors are investigated in detail using a new and accurate measurement technique based on Z-parameter equationa. Using the new measurement technique dc and ac current crowding effects have been explained clearly in bipolar junction transistors. To model ac crowding effects a capacitive element defined as base capacitance (C$_b$), called ac crowding capacitance is added to base resistance in parallel thereby treating the base resistance(R$_b$) as base impedance Z$_b$. It is shown that base resistance decreases with increasing collector current due to dc current crowding and approaches to a certain limited value at high collector current due to current crowding and approaches to a certain limited value at high collector currents regardless of the emitter size. It is also observed that due to ac current crowding base capacitance increases with increasing collector current. To quantigy the ac crowding effects for SPICE circuit simulation the base capacitance(C$_b$) including the base depletion and diffusion components has been modeled with an analytical expression form.

• Journal of Electrochemical Science and Technology
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• 제15권2호
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• pp.276-290
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• 2024

A study of the transition from transitory state to steady state in DSSCs based on natural dyes is presented; cochineal was used as dye and Li⁺, Na⁺, and K⁺ were the ions added to the electrolyte. The photocurrent profiles were obtained as a function of time. Several DSSCs were prepared with different cations and their role and the transitory-to-steady transition was determined. A novel hybrid charge carrier source model based on the Heaviside function H(t) and the Lambert-Beer law, was developed and applied to analysis of the transient response of the output photocurrent. Additionally, the maximum effective light absorption coefficient α and the electronic extraction rate κ for each ion were determined: ${\alpha}_{Li^+,Na^+,K^+}\,=\,(0.486,\,0.00085,\,0.1126)\,cm^{-1}$, and also the electronic extraction rate ${\kappa}^{Li^+,Na^+,K^+}_{ext.}\,=\,(1410,\,19.07,\,19.69)\,cm\,s^{-1}$. The impedance model using Fick's second law was developed for carrier recombination to characterize the photocurrent.

• Journal of Electrical Engineering and Technology
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• 제10권1호
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• pp.205-215
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• 2015

Common mode (CM) conducted interference are predicted and compared with experiments in a motor drive system of Electric vehicles in this study. The prediction model considers each part as an equivalent circuit model which is represented by lumped parameters and proposes the parameter extraction method. For the modeling of the inverter, a concentrated and equivalent method is used to process synthetically the CM interference source and the stray capacitance. For the parameter extraction in the power line model, a computation method that combines analytical method and finite element method is used. The modeling of the motor is based on measured date of the impedance and vector fitting technique. It is shown that the parasitic currents and interference voltage in the system can be simulated in the different parts of the prediction model in the conducted frequency range (150 kHz-30 MHz). Experiments have successfully confirmed that the approach is effective.

• ETRI Journal
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• 제28권1호
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• pp.115-118
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• 2006

In this letter, a simple model parameter extraction methodology for an on-chip spiral inductor is proposed based on a wide-band inductor model that incorporates parallel inductance and resistance to model skin and proximity effects, and capacitance to model the decrease in series resistance above the frequency near the peak quality factor. The wide-band inductor model does not require any frequency dependent elements, and model parameters can be extracted directly from the measured data with some curve fitting. The validity of the proposed model and parameter extraction methodology are verified with various size inductors fabricated using $0.18\;{\mu}m$ CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권2호
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• pp.88-93
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• 2004

We, for the first time, present novel test patterns and conclusive on-chip data indicating that the variation of coupling capacitance, ${\Delta}C_C$ by crosstalk can be larger than static coupling capacitance, $C_C$. The test chip is fabricated using a generic 150 nm CMOS technology with 7 level metallization. It is also shown that ${\Delta}C_C$ is strongly dependent on the phase of aggressive lines. For antiphase crosstalk ${\Delta}C_C$ is always larger than $C_C$ while for in-phase crosstalk $D_{\Delta}C_C$is smaller than $C_C$.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.671-674
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• 2005

The series parasitic resistances ($R_s$, $R_g$, $R_d$, $R_{sub}$) of BSIM3v3 RF MOSFET macro model were directly extracted from measured S-parameters in the GHz region by using simple 2-port parameter equations. Also, overlap capacitance and junction capacitance parameters were extracted by tuning $S_{11}$, $S_{12}$, and $S_{22}$ respectively while DC-parameters and all parasitic resistances are fixed at previously extracted values. These data are verified to be accurate by observing good correspondence between modeled and measured S-parameters up to 10GHz.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.820-824
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• 1992

An accurate method for extracting both Si film doping concentration and front or back silicon-to-oxide fixed charge density of fully depleted SOI devices is proposed. The method utilizes the current-to-voltage and capacitance-to-voltage characteristics of both SOI NMOSFET and PMOSFET which have the same doping concentration. The Si film doping concentration and the front or back silicon-to-oxide fixed charge density are extracted by mainpulating the respective threshold voltages of the SOI NMOSFET and PMOSFET according to the back surface condition (accumulation or inversion) and the capacitance-to-voltage characteristics of the SOI PMOSFET. Device simulations show that the proposed method has less than 10% errors for wide variations of the film doping concentration and the front or the back silicon-to-oxide fixed charge density.

• 전자공학회논문지A
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• 제31A권10호
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• pp.94-100
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• 1994

By using the RAPHAEL 3D inductance calculation program RI3, the PGA package inductance values of INTEL i486 microprocessor have been extracted. The lead frame layouts are drawn using the mentor Boardstation and the output files are converted into the RI3 program input format of RAPHAEL. The power and ground planes of the PGA package are modeled y grid-line structures of single bars. The capacitance valuse of signal lines have been clalculated by using the RAPHAEL 2D/3D capacitance extraction program. The extraced L, C, R values have been converted into the SPICE netlist formats with lumped circuit model for future use in the signal ingegrity analysis.