• Journal of KIISE:Computer Systems and Theory
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• v.29 no.2
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• pp.57-64
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• 2002

We implemented two fast PC clusters using fast PCs and high speed network. First. we built the first generation of 16 PC cluster and have used it for real-time operation at Cheju Regional Meteorological Office. Next, we built the second generation of 16PC with dual CUs cluster which was efficiently improved based on performance analysis of the first generation of cluster. In this research we also analyzed performance of two different clusters, which have different CPUs and communication devices using the parallel model MM5 which has been used for the real-time weather forecasting.

• Journal of the Society of Naval Architects of Korea
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• v.31 no.1
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• pp.63-70
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• 1994

The three-dimensional incompressible clavier-Stokes equations are solved to simulate the flow field around a Wigley model with free-surface. The IAF(Implicit Approximate Factorization) method is used to show a good success in reducing the computing time. The CPU time is almost an half of that if the IAF method were used. The present method adopts the local linearization and Euler implicit scheme without the pressure-gradient terms for the artificial viscosity. Calculations are carried out at the Reynolds number of $10^6$ and the Froude numbers are 0.25, 0.289 and 0.316. For the approximations of turbulence, the Baldwin-Lomax model is used. The resulting free-surface wave configurations and the velocity vectors are compared with those by the explicit method and experiments.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.04a
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• pp.635-638
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• 2009

컴퓨터 디스플레이를 위한 한글 표현 방법에는 한글 음절의 초성, 중성, 종성 각각에 코드를 부여하고, 이를 조합하여 1 음절을 2 바이트로 처리하는 표준 조합형 코드와 각 음절마다 2 바이트 코드를 부여하는 표준 완성형 코드, 그리고 모든 국가의 언어를 표현하기 위한 만국 공통의 문자부호 체계인 유니코드 방식이 있다. 일반적으로 임베디드 시스템은 PC에 비해 상대적으로 속도가 느리고 저장공간 또한 제한되어 있으나 그 용도에 따라 PC에 필적하는 성능을 가지는 경우도 있다. 따라서 화면에 한글을 출력할 경우, 임베디드 시스템의 자원 환경에 맞는 적합한 방식을 채택해야 한다. 본 논문은 시랩시스(CLabSys)사의 3.5" TFT LCD 키트인 LP35가 부착된 LN2440SBC 임베디드 보드(S3C2440A CPU, 400MHz)의 TFT LCD 드라이버 제작을 위한 초기화 방법과 픽셀 디스플레이 함수를 소개한다. 또한 픽셀 디스플레이 함수와 비트맵 폰트를 사용하여 표준 조합형, 표준 완성형, 유니코드 방식의 3가지 방식에 대한 한글 출력 처리 속도와 필요 메모리 용량을 비교한다. 시험 결과에 따르면, 표준 조합형은 적은 메모리 공간을 차지하지만 초성, 중성, 종성을 조합하는데 시간이 소요되고, 완성형은 조합형에 비해 출력 처리 속도는 빠르나 모든 음절의 저장을 위해 비트맵 폰트의 용량이 크며, 유니코드는 비트맵 폰트의 용량은 가장 크지만, 국가 간 언어의 호환성을 보장하고 출력 속도 또한 세 가지 방식 중 가장 빠른 것으로 나타났다.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.11a
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• pp.718-721
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• 2011

웹 서비스를 대상으로 하는 DDoS(Distributed Denial-of-Service) 공격 또는 유해 트래픽 유입을 탐지 또는 차단하기 위한 목적으로 HTTP(Hypertext Transfer Protocol) 트래픽을 실시간으로 분석하는 기능은 거의 모든 네트워크 트래픽 보안 솔루션들이 탑재하고 있는 필수적인 요소이다. 하지만, HTTP 트래픽의 실시간 데이터 측정 양이 시간이 지날수록 기하급수적으로 증가함에 따라, HTTP 트래픽을 실시간 패킷 단위로 분석한다는 것에 대한 성능 부담감은 날로 커지고 있는 실정이다. 이제는 응용 어플리케이션 차원에서는 성능에 대한 부담감을 해소할 수 없기 때문에 고비용의 소프트웨어 가속기나 하드웨어에 의존적인 전용 장비를 탑재하여 해결하려는 시도가 대부분이다. 본 논문에서는 현재 대부분의 PC 에 탑재되어 있는 그래픽 카드의 GPU(Graphics Processing Units)를 범용적으로 활용하고자 하는 GPGPU(General-Purpose computation on Graphics Processing Units)의 연구에 힘입어, NVIDIA사의 CUDA(Compute Unified Device Architecture)를 사용하여 네트워크 트래픽에서 HTTP 패킷 추출성능을 응용 어플리케이션 차원에서 향상시켜 보고자 하였다. HTTP 패킷 추출 연산만을 기준으로 GPU 의 연산속도는 CPU 에 비해 10 배 이상의 높은 성능을 얻을 수 있었다.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.11-20
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• 1998

Testability analysis computes controllabilities and observabilities of all lines of a circuit and then evaluates fault coverage. The values of controllability and observability as well as fault coverage produced by testability analysis are used for applications of testability analysis. ITEM was evaluated as a fault coverage tool. But the values of controllability and observability at all lines of circuits must be estimated as a performance measure of testability tools for another application such as partial scan. In this paper, partial scan method based on sensitivity analysis which estimates relative improvement of detectability of circuits after scanning a flip-flop is used for performance evaluation of ITEM. Performance of ITEM, with respect to testability values on each net, has been measured by comparing ITEM and STAFAN. Partial scan performance achieved by ITEM is very similar to that of STAFAN, but ITEM takes less CPU time. Therefore ITEM is very efficient for partial scan application because ITEM runs faster for very large circuits in which execution time is critical.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.1
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• pp.99-106
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• 2011

The emerging of ubiquitous computing and healthcare technologies provides us a strong platform to build sustainable healthcare applications especially those that require real-time information related to personal healthcare regardless of place. We realize that system stability, reliability and data protection are also important requirements for u-healthcare services. Therefore, in this paper, we designed a u-healthcare system which can be attached to the patient's body to measure vital signals, enhanced with USN secure sensor module. Our proposed u-healthcare system is using wireless sensor modules embedded with NLM-128 algorithm. In addition, PS-LFSR technique is applied to the NLM-128 algorithm to enable faster and more efficient computation. We included some performance statistical results in term of CPU cycles spent on NLM-128 algorithm with and without the PS-LFSR optimization for performance evaluation.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.2
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• pp.273-280
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• 2017

As massive integration technology of transistors has been developing, multi-core circuit is fabricated on a silicon chip and a clock frequency is getting faster to meet the system requirement. But increasing the clock frequency can induce some problems to violate the operation of system such as clock synchronization, so it is very import to avoid metastability events to design digital chips. In this paper, metastability windows are measured by bisection method in H-spice depending on temperature, supply voltage, and the size of transmission gate with D-FF designed with 180nm CMOS process. The simulation results show that the metastability window(: MW) is slightly increasing to temperature and supply voltage, but is quadratic to the area of a transmission gate, and the best area ration of P and Ntransitor in transmission gate is P/N=4/2 to get the least MW.

• Journal of IKEEE
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• v.24 no.1
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• pp.225-231
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• 2020

In this paper, we propose a method to accelerate BWN based on FPGA with limited resources for embedded system. Because of the limited number of logic elements available, a single computing unit capable of handling Conv-layer, FC-layer of various sizes must be designed and reused. Also, if the input feature map can not be parallel processed at one time, the output must be calculated by reading the inputs several times. Since the number of available BRAM modules is limited, the number of data bits in the BWN accelerator must be minimized. The image classification processing time of the BWN accelerator is superior when compared with a embedded CPU and is faster than a desktop PC and 50% slower than a GPU system. Since the BWN accelerator uses a slow clock of 50MHz, it can be seen that the BWN accelerator is advantageous in performance versus power.

• Journal of Advanced Navigation Technology
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• v.14 no.3
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• pp.452-458
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• 2010

In case of an embedded system with computing resource restrictions such as system power and cpu, the overhead due to displaying data on the computer screen may have a significant influence on the system performance. This paper describes an initialization method for LCD-driving components such as an ARM Core, an LCD controller, and an SPI(serial peripheral interface). It also introduces a pixel display function and a panel display method using virtual screen for reducing the display overhead for an LN2440SBC system with an ARM9-based S3C2440A microprocessor. A virtual screen is a large space of computer memories allocated much larger than those needed for one-time display of an image. Displaying a specific region of a virtual screen is done by assigning it as a view-port region. Such a display is useful in an embedded system when concurrently running tasks produce and display their respective results on the screen; it is especially so when the execution result of each task is partially modified, instead of being totally modified, on its turn and displayed. If the tasks running on such a system divide and make efficient use of the region of the virtual screen, the display overhead can be minimized. For the performance comparison with and without using the virtual screen, two different images are displayed in turn and the amount of time consumed for their display is measured. The result shows that the display time of the former is about 5 times faster than that of the latter.

• Journal of KIISE
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• v.42 no.2
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• pp.242-254
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• 2015

In this paper, we address the problem of improving the performance of multi-step k-NN search using multi-dimensional indexes. Due to information loss by lower-dimensional transformations, existing multi-step k-NN search solutions produce a large tolerance (i.e., a large search range), and thus, incur a large number of candidates, which are retrieved by a range query. Those many candidates lead to overwhelming I/O and CPU overheads in the postprocessing step. To overcome this problem, we propose two efficient solutions that improve the search performance by reducing the tolerance of a range query, and accordingly, reducing the number of candidates. First, we propose a tolerance reduction-based (approximate) solution that forcibly decreases the tolerance, which is determined by a k-NN query on the index, by the average ratio of high- and low-dimensional distances. Second, we propose a coefficient control-based (exact) solution that uses c k instead of k in a k-NN query to obtain a tigher tolerance and performs a range query using this tigher tolerance. Experimental results show that the proposed solutions significantly reduce the number of candidates, and accordingly, improve the search performance in comparison with the existing multi-step k-NN solution.