• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(5)
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• pp.195-198
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• 2000

A CMOS power amplifier for wireless home networks is designed using 0.2sum 1-poly 5-metal standard CMOS technology and simulation results are presented. The power amplifier provides maximum output power of 16.5dBm to a 50-Ohm load at 2.450Hz and dissipates 220mW of dc power from a single 2.5-V supply. The designed CMOS power amplifier has power control range of 20dB and an overall power-added efficiency of 17%

• 전기학회논문지
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• 제61권3호
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• pp.422-426
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• 2012

Transient radiation is emitted during a nuclear explosion. Transient radiation causes a fatal error in the CMOS circuit as a Upset and Latch-up. In this paper, transient radiation NMOS, PMOS, INVERTER SPICE model was proposed on the basisi of transient radiation effects analysis using TCAD(Technology Computer Aided Design). Photocurrent generated from the MOSFET internal PN junction was expressed to the current source and Latch-up phenomenon in the INVERTER was expressed to parasitic thyristor for the transient radiation SPICE model. For example, the proposed transient radiation SPICE model was applied to CMOS NAND circuit. SPICE simulated characteristics were similar to the TCAD simulation results. Simulation time was reduced to 120 times compared to TCAD simulation.

• 전기학회논문지
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• 제57권7호
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• pp.1254-1259
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• 2008

A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.589-592
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• 2002

A CMOS power amplifier for IMT-2000 is designed with 0.25-${\mu}m$ CMOS technology. This amplifier circuits consist of two cascode stages. Used cascode structure has good reverse isolation. These amplifier circuits consist of two stages which are driver stage and power amplification stage. The designed power amplifier is simulated with ADS using 0.25-${\mu}m$ CMOS library at 3.3 V power supply. Simulation results indicate that the amplifier has a PAE of 39 % and power gain of 24 dBm at 1.95 GHz.

• 한국전기전자재료학회논문지
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• 제17권2호
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• pp.162-170
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• 2004

A 900MHz CMOS RF power amplifier with digitally controllable output power has been proposed and designed with 0.6${\mu}{\textrm}{m}$ standard CMOS technology. The designed power amplifier was composed of digitally controllable switch mode pre-amplifiers with an integrated 4nH spiral inductor load and class-C output stage. Especially, to compensate the 1ow Q of integrated spiral inductor, cascode amplifier with a Q-enhancement circuit is used. It has been shown that the proposed power control technique allows the output power to change from almost 3dBm to 13.5dBm. And it has a maximum PAE(Power Added Efficiency) of almost 55％ at 900MHz operating frequency and 3V power supply voltage.

• 한국시뮬레이션학회논문지
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• 제11권2호
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• pp.17-29
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• 2002

There is an increasing interest in high-performance A/D(Analog-to-Digital) converters for use in integrated analog and digital mixed processing systems. Pipeline A/D converter architectures coupled with BiCMOS process technology have the potential for realizing monolithic high-speed and high-accuracy A/D converters. In this paper, the design of 12bit pipeline BiCMOS A/D converter presented. A BiCMOS operational amplifier and comparator suitable for use in the pipeline A/D converter. Test/simulation results of the circuit blocks and the converter system are presented. The main features is low distortion track-and-hold with 0-300MHz input bandwidth, and a proprietary 12bit multi-stage quantizer. Measured value is DNL=${\pm}$0.30LSB, INL=${\pm}$0.52LSB, SNR=66dBFS and SFDR=74dBc at Fin=24.5MHz. Also Fabricated on 0.8um BiCMOS process.

• 전기학회논문지
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• 제64권12호
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• pp.1737-1741
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• 2015

A multi-channel CMOS transimpedance amplifier(TIA) array is realized in a $0.18-{\mu}m$ CMOS technology for the applications of panoramic scan LADAR systems. Each channel consists of a PIN photodiode and a feed-forward TIA that exploits an inverter input stage followed by a feed-forward common-source amplifier so as to achieve lower noise and higher gain than a conventional voltage-mode inverter TIA. Measured results demonstrate that each channel achieves $76-dB{\Omega}$ transimpedance gain, 720-MHz bandwidth, and -20.5-dBm sensitivity for $10^{-9}$ BER. Also, a single channel dissipates the power dissipation of 30 mW from a single 1.8-V supply, and shows less than -33-dB crosstalk between adjacent channels.

• 센서학회지
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• 제19권6호
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• pp.469-474
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• 2010

This paper presents a 10Gbps CMOS parallel-to-serial converter for transmission of sensor data. A low-noise clock multiplying unit(CMU) and a multiplexer with controllable data sequence are proposed. The transmitter was fabricated in 0.13 um CMOS process and the measured total output jitter was less than 0.1 UIpp(unit-interval, peak-to-peak) over 20 kHz to 80 MHz bandwidth. The jitter of the CMU output only was measured as 0.2 ps,rms. The transmitter dissipates less than 200 mW from 1.5 V/2.5 V power supplies.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2016년도 추계학술대회
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• pp.647-648
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• 2016

본 논문에서는 차량용 레이더를 위한 저 전력 24GHz CMOS 저 잡음 증폭기를 제안한다. 이러한 회로는 1.8볼트 전원에서 동작하며, 저 전력에서도 높은 전압 이득과 낮은 잡음지수를 가지도록 설계되어 있다. 제안한 회로는 TSMC $0.13{\mu}m$ 고주파 CMOS 공정으로 구현되어 있다. 제안한 회로는 최근 발표된 연구결과에 비해 저 전력동작에서 높은 전압이득 및 낮은 잡음지수 특성을 보였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.345-348
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• 2002

A complementary VHF CMOS active inductor is described. The proposed circuit employs 'p-type' and 'n-type' active inductor to obtain enlarged signal handling ability. Under the same inductance, Q value, and power consumption, the proposed circuit shows more than 12-㏈ improvement in dynamic range while maintaining high-frequency operation. Further enhancement is obtained by using a fully differential floating inductor structure. A 1-㎓ 4$\^$th/-order coupled-resonator filter is designed to demonstrate the potential of the proposed active inductor.