• Journal of Sensor Science and Technology
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• v.17 no.2
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• pp.147-150
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• 2008

Multiple ZnO nanorod device detecting $NO_2$ gas was fabricated by sol-gel growth method and gas response characteristics were measured as a chemical gas sensor. The device is mainly composed of sensing electrode and sensing nano material. To acquire high sensitivity of the device for $NO_2$ gas it was heated by a heat chuck up to $400^{\circ}C$ The sensing part was easily made using the CMOS compatible process, for example, the large area and low temperature nano material growth process, etc. The sensors were successfully demonstrated and showed high sensitive response for $NO_2$ gas sensing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.95-96
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• 2006

CMOS Image Sensor(CIS) 소자에서 광감도의 향상과 천연색 형성을 위하여 적용하고 있는 Color-Filter 공정에서 국부적으로 발생하는 strip성 불량과 막질손상을 제거하기 위한 연구를 진행하였다. 우선 지역적 경향성을 보이는 불량에 대해서는 PR strip process type을 액조 진행방식에서 회전식으로 변경했을 때 제거됨을 확인하였고, 막질손상을 최소화하기 위해서는 새로운 유기용매의 적용이 필요하였다. 실험 결과, 케톤기를 가지는 화합물과 Polar Apotic 용매의 혼합화합물을 적용하였을 때 각 막질에 attack을 최소화하면서 원하는 PR만 선택적으로 제거 되며 미세잔류성분에 대한 제거력도 향상됨을 확인하였다.

• Journal of information and communication convergence engineering
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• v.7 no.4
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• pp.507-515
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• 2009

In this paper, we propose an image signal processor (ISP) for an ultra small HD-grade video sensor with 3A (AWB, AE, and AF) in camera phones that can process 720P/30fps videos. In order to enhance the video quality of the systems, it is necessary to achieve the high performance of the 3A. The proposed AWB algorithm multiplies the adjusted coefficients of color gains to the captured data of white objects. The proposed AE method adopts the index step moving based on the difference between an averaged Y luminance and a target luminance, together with IIR filters with variable time responses. The proposed AF technique controls the focus curve to find the lens position that maximizes the integrated high frequency components in luminance values by using highpass filters. Finally, we compare the image quality captured from our system to the quality of a commercial HD camcorder in order to evaluate the performance of the proposed ISP. The proposed ISP system is also fabricated with 0.18um CMOS flash memory process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.10
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• pp.831-837
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• 2002

Scaled SONOS transistors have been fabricated by 0.35$\mu\textrm{m}$ CMOS standard logic process. The thickness of stacked ONO(blocking oxide, memory nitride, tunnel oxide) gate insulators measured by TEM are 2.5 nm, 4.0 nm and 2.4 nm, respectively. The SONOS memories have shown low programming voltages of ${\pm}$8.5 V and long-term retention of 10-year Even after 2 ${\times}$ 10$\^$5/ program/erase cycles, the leakage current of unselected transistor in the erased state was low enough that there was no error in read operation and we could distinguish the programmed state from the erased states precisely The tight distribution of the threshold voltages in the programmed and the erased states could remove complex verifying process caused by over-erase in floating gate flash memory, which is one of the main advantages of the charge-trap type devices. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ cycles can be realized by the programming method for a flash-erased type EEPROM.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.4
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• pp.285-289
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• 2009

Small RFID tag antenna were fabricated on Si substrate and their physical and electrical properties were evaluated. With decreasing the size of tag antenna on Si substrate, small SMD-type RFID tags could be fabricated, which is very useful for various applications including PCB tracking. Firstly, electromagnetic properties on tag antenna pattern were simulated with HFSS. The setup frequency was 13.56 MHz of HF-band RFID. The line-width and line-gap were modeled in the range of $50{\sim}200{\mu}m$. S parameters, SRF, and Q value were calculated from the model. When the line-width and line-gap were 100 urn and the loop-turn was 10, the SRF was 80 MHz and the Q value was ca. 9. When the microstrip antenna pattern of aluminum was fabricated by using DC sputtering, Vpp of ca. 1.6 V was obtained when the reader-tag distance was 40 mm.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.3
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• pp.198-206
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• 2013

This paper presents a wide band, fine-resolution digitally controlled oscillator (DCO) with an on-chip 3-D solenoid inductor using the 0.13 ${\mu}m$ digital CMOS process. The on-chip solenoid inductor is vertically constructed by using Metal and Via layers with a horizontal scalability. Compared to a spiral inductor, it has the advantage of occupying a small area and this is due to its 3-D structure. To control the frequency of the DCO, active capacitor and active inductor are tuned digitally. To cover the wide tuning range, a three-step coarse tuning scheme is used. In addition, the DCO gain needs to be calibrated digitally to compensate for gain variations. The DCO with solenoid inductor is fabricated in 0.13 ${\mu}m$ process and the die area of the solenoid inductor is 0.013 $mm^2$. The DCO tuning range is about 54 % at 4.1 GHz, and the power consumption is 6.6 mW from a 1.2 V supply voltage. An effective frequency resolution is 0.14 kHz. The measured phase noise of the DCO output at 5.195 GHz is -110.61 dBc/Hz at 1 MHz offset.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.5
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• pp.113-120
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• 1994

Silicon flow sensor that can detect the velocity and direction of air flow was designed and fabricated by integrated circuit process and bulk micromachining technique. The flow sensor consists of three-layered dielectric diaphragm, a heater at the center of the diaphragm, and four thermopiles surrounding the heater at each side of diaphragm as sensing elements. This diaphragm structure contributes to improve the sensitivity of the sensor due to excellent thermal isolation property of dielectric materials and their tiny thickness. The flow sensor has good axial symmetry to sense 2-D air flow with the optimized sensing position in the proposed structure. The sensor is fabricated using CMOS compatible process followed by the anisotropic etching of silicon in KOH and EDP solutions to form I$\mu$ m thick dielectric diaphragm as the last step. TCR(Temperature Coefficient of Resistance) of the heater of the fabricated sensors was measured to calculate the operating temperature of the heater and the output voltage of the sensor with respect to flow velocity was also measured. The TCR of the polysilicon heater resistor is 697ppm/K, and the operating temperature of the heater is 331$^{\circ}C$ when the applied voltage is 5V. Measured sensitivity of the sensor is 18.7mV/(m/s)$^{1/2}$ for the flow velocity of smaller than 10m/s.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.141-157
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• 2001

Highly reliable packaged 64kbit ferroelectric memories with $0.8{\;}\mu\textrm{m}$ CMOS ensuring ten-year retention and imprint at 125^{\circ}C$ have been successfully developed. These superior reliabilities have resulted from steady integration schemes free from the degradation, due to layer stress and attacks of process impurities. The resent results of research and development for ferroelectric memories at Hynix Semiconductor Inc. are summarized in this invited paper.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.155-159
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• 2003

This paper presents fully integrated 5 GHz band low phase noise LC tank VCO. The implemented VCO is tuned by integrated PN diode and tuning rage is $5.01{\sim}5.30$ GHz under $0{\sim}3 V$ control voltage. For good phase noise performance, LC filtering technique, common in Si CMOS process, is used, and to prevent degradation of phase noise performance by collector shot-noise and to reduce power dissipation the HBT is biased at low collector current density bias point. The measured phase noise is -87.8 dBc/Hz at 100 kHz offset frequency and -111.4 dBc/Hz at 1 MHz offset frequency which is good performance. Moreover phase noise is improved by roughly 5 dEc by LC filter. It is the first experimental result in InGaP/GaAs HBT process. The figure of merit of the fabricated VCO with LC filter is -172.1 dBc/Hz. It is the best result among 5 GHz InGaP HBT VCOs. Moreover this work shows lower DC power consumption, higher output power and more fixed output power compared with previous 4, 5 GHz band InGaP HBT VCOs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.80-83
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• 2003

In this paper, the programming characteristics of the multi-bit devices based on SONOS structure are investigated. Our devices have been fabricated by $0.35\;{\mu}m$ complementary metal-oxide-semiconductor (CMOS) process with LOCOS isolation. In order to achieve the two-bits per cell operation, charges must be locally trapped in the nitride layer above the channel near the junction. Channel hot electron (CHE) injection for programming can operate in multi-bit using localized trap in nitride film. CHE injection in our devices is achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The multi-bit operation which stores two-bit per cell is investigated with a reverse read scheme. Also, hot hole injection for fast erasing is used. Due to the ultra-thin gate dielectrics, our results show many advantages which are simpler process, better scalability and lower programming voltage compared to any other two-bit storage flash memory. This fabricated structure and programming characteristics are shown to be the most promising for the multi-bit flash memory.