• Journal of Information Processing Systems
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• v.11 no.2
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• pp.266-279
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• 2015

In this paper, we propose a novel block cipher mode of operation, which is known as the counter chain (CC) mode. The proposed CC mode integrates the cipher block chaining (CBC) block cipher mode of operation with the counter (CTR) mode in a consistent fashion. In the CC mode, the confidentiality and authenticity of data are assured by the CBC mode, while speed is achieved through the CTR mode. The proposed mode of operation overcomes the parallelization deficiency of the CBC mode and the chaining dependency of the counter mode. Experimental results indicate that the proposed CC mode achieves the encryption speed of the CTR mode, which is exceptionally faster than the encryption speed of the CBC mode. Moreover, our proposed CC mode provides better security over the CBC mode. In summary, the proposed CC block cipher mode of operation takes the advantages of both the Counter mode and the CBC mode, while avoiding their shortcomings.

• Korean Journal of Optics and Photonics
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• v.24 no.5
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• pp.262-270
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• 2013

In this paper, we propose a modified optical CBC(Cipher Block Chaining) encryption method using optical XOR logic operations. The proposed method is optically implemented by using dual encoding and a free-space interconnected optical logic gate technique in order to process XOR operations in parallel. Also, we suggest a CBC encryption/decryption optical module which can be fabricated with simple optical architecture. The proposed method makes it possible to encrypt and decrypt vast two-dimensional data very quickly due to the fast optical parallel processing property, and provides more security strength than the conventional electronic CBC algorithm because of the longer security key with the two-dimensional array. Computer simulations show that the proposed method is very effective in CBC encryption processing and can be applied to even ECB(Electronic Code Book) mode and CFB(Cipher Feedback Block) mode.

• Journal of Information Processing Systems
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• v.20 no.1
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• pp.24-37
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• 2024

To address the requirement for high-speed encryption of large amounts of data, this study improves the widely adopted cipher block chaining (CBC) mode and proposes a controllable parallel cipher block chaining (CPCBC) block cipher mode of operation. The mode consists of two phases: extension and parallel encryption. In the extension phase, the degree of parallelism n is determined as needed. In the parallel encryption phase, n cipher blocks generated in the expansion phase are used as the initialization vectors to open n parallel encryption chains for parallel encryption. The security analysis demonstrates that CPCBC mode can enhance the resistance to byte-flipping attacks and padding oracle attacks if parallelism n is kept secret. Security has been improved when compared to the traditional CBC mode. Performance analysis reveals that this scheme has an almost linear acceleration ratio in the case of encrypting a large amount of data. Compared with the conventional CBC mode, the encryption speed is significantly faster.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.653-656
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• 2013

TFTP(Trivial File Transfer Protocol)는 UDP(User Datagram Protocol) 기반의 파일 전송 프로토콜이다. TFTP는 프로토콜 구조가 단순하여 작은 크기의 데이터를 빠른 속도로 전송할 때 사용된다. 하지만 TFTP는 보안 기능을 지원하지 않기 때문에 데이터 노출의 위험이 있다. 본 논문에서는 Diffie-Hellman 키 교환 방식과 AES-CBC(Advanced Encryption Standard-Cipher Block Chaining) 암호화 방식을 이용하여 TFTP 프로토콜에 보안 기능을 추가하였다. Diffie-Hellman 키 교환 방식을 이용하여 두 사용자 간에 비밀 키를 공유하도록 하였고, AES-CBC 암호화를 지원하여 기밀성을 제공하도록 하였다. 수신된 데이터는 암호화 과정의 역으로 복호화를 수행하였다. WireShark 프로그램을 통하여 암호화된 데이터가 전송 되는 것을 확인하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.5
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• pp.317-322
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• 2014

Data security and integrity is a critical issue in data transmission over wired/wireless links. A large amount of data is encrypted before transmission, by block cipher using mode of operation. RBF mode is a block cipher mode of operation which uses random characteristics. In this paper, we analyze the safety against known plaintext attack and chosen plaintext attack of RBF mode compared to the traditional modes. According to the analysis, RBF mode is known to be secure while the traditional modes are not secure against them.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2657-2662
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• 2010

Demand on information security in mobile devices based control system grows rapidly with a view to counteracting information hacking and leakage. Among these techniques, encryption and authentication are most common. This paper presents CBC-MAC (Cipher Block Chaining-Message Authentication Code) based mobile devices control system. The system is termed as Secure Mobile in Vehicle (SMIV)We use CBC-MAC that is one of the most efficient authentication modes to protect information against any malicious attacks. By sharing the secret key of CBC-MAC between the transmitter and receiver, it asserts authentic information. The proposed system is verified in such a way that we develop mobile devices control system, apply the CBC-MAC algorithm to the control system and validate the received data. Unlike conventional systems where the development of control mechanism in mobile devices based control systems is main concern, this proposed system offers a secure communication link of the data in mobile devices control system and therefore would be useful to the design and implementation of various mobile devices based control systems.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.4
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• pp.798-803
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• 2005

This paper describes a design of AES(Advanced Encryption Standard)-based CCMP core for IEEE 802.1li wireless LAN security. To maximize its performance, two AES cores ate used, one is for counter mode for data confidentiality and the other is for CBC(Cipher Block Chaining) mode for authentication and data integrity. The S-box that requires the largest hardware in AES core is implemented using composite field arithmetic, and the gate count is reduced by about $20\%$ compared with conventional LUT(Lookup Table)-based design. The CCMP core designed in Verilog-HDL has 13,360 gates, and the estimated throughput is about 168 Mbps at 54-MHz clock frequency. The functionality of the CCMP core is verified by Excalibur SoC implementation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.367-370
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• 2005

This paper describes a design of AES(Advanced Encryption Standard)-based CCMP core for IEEE 802.11i wireless LAN security. To maximize its performance, two AES cores are used, one is for counter mode for data confidentiality and the other is for CBC(Cipher Block Chaining)mode for authentication and data integrity. The S-box that requires the largest hardware in AES core is implemented using composite field arithmetic, and the gate count is reduced by about 25% compared with conventional LUT(Lookup Table)-based design. The CCMP core designed in Verilog-HDL has 15,450 gates, and the estimated throughput is about 128 Mbps at 50-MHz clock frequency). The functionality of the CCMP core is verified by Excalibur SoC implementation.

• Journal of the Korea Computer Industry Society
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• v.10 no.4
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• pp.167-176
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• 2009

In this paper, we propose an improved SHACAL-1 of the same encryption and decryption with a simple symmetric layer. SHACAL-1 has 4 rounds, and each round has 20 steps. Decryption is becoming inverse function of encryption, In this paper, we proposed SHACAL-1 are composed of the first half, symmetry layer and the last half. The first half with SHACAL-1 encryption algorithm 1 round does with 10 steps and composes of 4 round. The last half identically with SHACAL-1 decryption algorithm, has a structure. On the center inserts a symmetry layer, encryption and decryption algorithm identically, composes. In the experiments, the proposed SHACAL-1 algorithm showed similar execution time to that of the SHACAL-1. Thanks to the symmetric layer, the proposed algorithm makes it difficult for the attacks which take advantages of high probability path such as the linear cryptanalysis, differential cryptanalysis. The proposed algorithm can be applicable to the other block cipher algorithms which have different encryption and decryption and useful for designing a new block cipher algorithm.

• IEIE Transactions on Smart Processing and Computing
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• v.6 no.2
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• pp.133-139
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• 2017

Vehicles have increasingly evolved and become intelligent with convergence of information and communications technologies (ICT). Vehicle communications (VC) has become one of the major necessities for intelligent vehicles. However, VC suffers from serious security problems that hinder its commercialization. Hence, the IEEE 1609 Wireless Access Vehicular Environment (WAVE) protocol defines a security service for VC. This service includes Advanced Encryption Standard-Counter with CBC-MAC (AES-CCM) for data encryption in VC. A high-speed AES-CCM crypto module is necessary, because VC requires a fast communication rate between vehicles. In this study, we propose and implement an efficient AES-CCM hardware architecture for high-speed VC. First, we propose a 32-bit substitution table (S_Box) to reduce the AES module latency. Second, we employ key box register files to save key expansion results. Third, we save the input and processed data to internal register files for secure encryption and to secure data from external attacks. Finally, we design a parallel architecture for both cipher block chaining message authentication code (CBC-MAC) and the counter module in AES-CCM to improve performance. For implementation of the field programmable gate array (FPGA) hardware, we use a Xilinx Virtex-5 FPGA chip. The entire operation of the AES-CCM module is validated by timing simulations in Xilinx ISE at a speed of 166.2 MHz.