• The KIPS Transactions:PartD
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• v.8D no.6
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• pp.771-780
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• 2001

EJB(Enterprise JavaBeans) is the server-side component model and its purpose is to reduce the complexity of software development and to increase software reusability. Many concerns for development of EJB components have recently been raised. However, it is difficult to compose EJB components provided by third parties through the plug-and-play method. Therefore, the composition method by lego block styles is needed for EJB components. In this paper, we propose an approach to composition of EJB components using the C2 architectural style. In order to support EJB composition, we modified the general C2 architecture framework. We propose how to create EJB wrappers that can compose EJB components according to the C2 framework. Our approach also enables developers to create a new composite EJB that uses a C2 architecture which is composed of EJB components. To do this, we propose how to create a new composite EJB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.2C
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• pp.291-297
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• 2004

In this paper, a new structure for the AEC(Acoustic Echo Canceller) is proposed in which echo signal components that can be created in mobile communications is effectively eliminated. Block Data Flow Architecture is a parallel architecture that achieves high performance, high efficiency, high throughput, and almost linear speed up. The proposed architecture employs AEC and is implemented using the TMS320C6711 for real-time applications. The proposed AEC shows improved performance by eliminating echoes at 55ms delay path. Since the proposed AEC can also be implemented in Firmware, it is believed to effectively work on various types of echoes if it is applied on CDMA mobile devices. The TMS320C6711 shows much better performance comparing to previous DSPs. For experimental verifications, filtering operation using adaptive algorithm is performed on TMS320C6711 board and error signals resulted from computations are monitored on PC, and then the performance of the implemented AEC is verified through ERLE computation. According the results of simulation, good characteristic of 100dB are shown after 500 sampling data.

• Earthquakes and Structures
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• v.8 no.2
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• pp.401-422
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• 2015

This paper evaluates the effectiveness of three nonlinear static methods for the prediction of the dynamic response of in-plan irregular buildings. The methods considered are the method suggested in Eurocode 8, a method previously proposed by some of the authors and based on corrective eccentricities and a new method in which two pushover analyses are considered, one with lateral forces applied to the centres of mass of the floors and the other with only translational response. The numerical analyses are carried out on a set of refined models of reinforced concrete framed buildings. The response predicted by the nonlinear static analyses is compared to that provided by nonlinear dynamic analyses. The effectiveness of the nonlinear static methods is evaluated in terms of absolute and interstorey displacements.

• ETRI Journal
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• v.36 no.2
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• pp.293-300
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• 2014

As the system-on-chip (SoC) design becomes more complex, the test costs are increasing. One of the main obstacles of a test cost reduction is the limited number of test channels of the ATE while the number of pins in the design increases. To overcome this problem, a new test architecture using a channel sharing compliant with IEEE Standard 1149.1 and 1500 is proposed. It can significantly reduce the pin count for testing a SoC design. The test input data is transmitted using a test access mechanism composed of only input pins. A single test data output pin is used to measure the sink values. The experimental results show that the proposed architecture not only increases the number of sites to be tested simultaneously, but also reduces the test time. In addition, the yield loss owing to the proven contact problems can be reduced. Using the new architecture, it is possible to achieve a large test time and cost reduction for complex SoC designs with negligible design and test overheads.

• Journal of Ocean Engineering and Technology
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• v.33 no.2
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• pp.203-203
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• 2019

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.12
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• pp.1902-1918
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• 1993

Parallel architecture based on the von Neumann computation model has a limitation as a massively parallel architecture due to its inherent drawback of architectural features. The data-flow model of computation has a high programmability in software perspective and high scalability in hardware perspective. However, the practical programming and experimentaion of date-flow architectures are hardly available due to the absence of practical data-flow, we present a programming environment for performing the data-flow computation on conventional parallel machines in general, loosely compled multiprocessor system in particular. We build an emulator for tagged token data-flow architecture on the iPSC/2 hypercube, a loosely coupled multiprocessor system. The emulator is a shallow layer of software executing on an iPSC/2 system, and thus makes the iPSC/2 system work as a data-flow architecture from the programmer`s viewpoint. We implement various numerical and non-numerical algorithm in a data-flow assembler language, and then compare the performance of the program with those of the versions of conventional C language, Consequently, We verify the effectiveness of this programming environment based on the emulator in experimenting the data-flow computation on a conventional parallel machine.

• Journal of the Korean Solar Energy Society
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• v.28 no.2
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• pp.19-27
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• 2008

This study aims at examining the correlation between air temperature and urban structure such as land cover. For this, it measured summer air temperature by using data log type thermometer installed the inside of instrument screen, in the 9 points of elementary school in Haeundae, Busan. The accomplished results of this study are followings. 1) As altitude goes up 100m, air temperature drops to $0.6{\sim}1.0^{\circ}C$. 2) As building coverage ratio increases 10%, air temperature increases $0.3{\sim}0.4^{\circ}C$. 3) As floor space index increases 100%, air temperature increases $0.4{\sim}0.5^{\circ}C$. 4) As artificial coverage ratio increases 10%, air temperature increases $0.1{\sim}0.2^{\circ}C$. 5) As natural coverage ratio increases 10%, air temperature decreases $0.1{\sim}0.2^{\circ}C$.

• The KIPS Transactions:PartC
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• v.9C no.5
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• pp.743-748
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• 2002

In recent research for the Internet, many studies have investigated the Diffserv AS architecture that can provide Quality of Service. However, this architecture still lacks the qualification to provide full use of the bandwidth to the customer In this paper, we propose the TS2W3C (Time Sliding Two Window Three Color) marking algorithm to improve the fair share of bandwidth by enhancing the TSW (Time Sliding Window) marking algorithm. Our proposed mechanism provides the bandwidth relatively more fairly than the TSW mechanism.

• The KIPS Transactions:PartC
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• v.14C no.2
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• pp.171-178
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• 2007

In mobile ad hoc networks, an application scenario requires mostly group mobility behavior in the mix of group moving nodes and individually moving nodes. The nodes of those applications tend to belong to the movement group with similar movement behavior. Group mobility is one of the good methods to improve scalability, and reduces the protocol overhead. In this paper, we propose the multicast architecture which regards nodes that have equal group mobility in the heterogeneous group mobility network as the single entity with the multiple interfaces and composes multicast tree, The logical cooperative entity-based multicast architecture accommodates the scalability, the multicast tree simplification, and the protocol overhead reduction which arc obtained from the hierarchical multicast architecture, while it maintains the nat multicast architecture for the data transmission. It also prevents the concentration of the energy consumption dispersing data forwarding load into the several ingress/egress nodes. Results obtained through simulations show that logical cooperative entity based multicast protocol with multiple interfaces offers the protocol scalability and the efficient data transmission.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.9
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• pp.22-32
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• 1997

This paper proposes an imprecise compuitation model for DCT considering QOS of images and a two dimensional DCT architecture for imprecise computations. In case that many processes are scheduling in a hard real time system, the system resources are shared among them. Thus all processes can not be allocated enough system resources (such as processing power and communication bandwidth). The imprecise computtion model can be used to provide scheduling flexibility and various QOS(quality of service)levels, to enhance fault tolerance, and to ensure service continuity in rela time systems. The DCT(discrete cosine transform) is known as one of popular image data compression techniques and adopted in JPEG and MPEG algorithms since the DCT can remove the spatial redundancy of 2-D image data efficiently. Even though many commercial data compression VLSI chips include the DCST hardware, the DCT computation is still a very time-consuming process and a lot of hardware resources are required for the DCT implementation. In this paper the DCT procedure is re-analyzed to fit to imprecise computation model. The test image is simulated on teh base of this model, and the computation time and the quality of restored image are studied. The row-column algorithm is used ot fit the proposed imprecise computation DCT which supports pipeline operatiions by pixel unit, various QOS levels and low speed stroage devices. The architecture has reduced I/O bandwidth which could make its implementation feasible in VLSI. The architecture is proved using a VHDL simulator in architecture level.