• 한국전기전자재료학회논문지
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• 제22권2호
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• pp.101-106
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• 2009

In this paper, Thin films of $HfO_2$/Hf were deposited on p-type wafer by Atomic Layer Deposition (ALD). We studied the electrical and material characteristics of $HfO_2$/Hf/Si MOS capacitor depending on thickness of Hf metal layer. $HfO_2$ films were deposited using TEMAH and $O_3$ at $350^{\circ}C$. Samples were then annealed using furnace heating to $500^{\circ}C$. Round-type MOS capacitors have been fabricated on Si substrates with $2000\;{\AA}$-thick Pt top electrodes. The composition rate of the dielectric material was analyzed using TEM (Transmission Electron Microscopy), XRD (X-ray Diffraction) and XPS (X-ray Photoelectron Spectroscopy). Also the capacitance-voltage (C-V), conductance-voltage (G-V), and current-voltage (I-V) characteristics were measured. We calculated the density of oxide trap charges and interface trap charges in our MOS device. At the interface between $HfO_2$ and Si, both Hf-Si and Hf-Si-O bonds were observed, instead of Si-O bond. The sandwiched Hf metal layer suppressed the growing of $SiO_x$ layer so that $HfSi_xO_y$ layer was achieved. And finally, the generation of both oxide trap charge and interface trap charge in $HfO_2$ film was reduced effectively by using Hf metal layer.

• 센서학회지
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• 제3권1호
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• pp.5-11
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• 1994

본 논문은 실리콘기판 직접접합기술과 에피택샬 성장법으로 각각 형성한 SOI구조, 즉 Si/$SiO_{2}$/Si 및 Si/$Al_{2}O_{3}$/Si 상에 제작한 압저항형 압력센서의 특성을 기술한다. SOI구조의 절연층을 압저항의 유전체 분리막으로 이용한 압력센서는 $300^{\circ}C$ 까지 사용 가능했다. SOI구조의 절연층을 박막 실리콘 다아어프램 형성시 에칭 중지막으로 이용한 경우, 제작된 압력센서의 200개 소자들에 대한 압력감도의 변화는 ${\pm}2.3%$ 이내로 제어 가능했다. 더구나 실리콘 기판 직접접합기술과 에피택샬 성장법의 결합으로 형성한 더불 SOI구조($Si/Al_{2}O_{3}/Si/SiO_{2}/Si$)상에 제작된 압력센서는 고온분위기에서 사용 가능할 뿐만 아니라 고분해 능력을 갖는 특성을 보였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 전자세라믹스 센서 및 박막재료 반도체재료 일렉트렛트 및 응용기술
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• pp.47-51
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• 2000

A modified direct bonding technique employing a wet chemical deposition of $SiO_2$ film on a wafer surface to be bonded is proposed for the fabrication of Si-$SiO_2$-Si structures. Structural and electrical quality of the bonded wafers is studied. Satisfied insulating properties of interfacial $SiO_2$ layers are demonstrated. Elastic strain caused by surface morphology is investigated. The diminution of strain in the grooved structures is semi-quantitatively interpreted by a model considering the virtual defects distributed over the interfacial region.

• 한국전기전자재료학회논문지
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• 제14권5호
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• pp.410-416
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• 2001

KLN thin films were fabricated on Pt coated Si(100) wafer using an rf-magnetron sputtering method. The grown KLN thin film consists of 4-fold grains. In this experiment, the structure of 4-fold grained thin film was investigated using XRD and SEM measurements. Pt layer was also deposited using the rf-magnetron sputtering method,. XRD measurement showed that he Pt thin film has Gaussian distribution form with strong (111) direction orientation. The KLN thin film has preferred-orientation of (001) direction, and the peak consists of 2 separate peaks; one with broad FWHM and the other with narrow FWHM. The sharp peak is due to single crystal, and combining with Em results, the 4-fold grain consists of singel crystals with c-axis normal to substrate.

• Bulletin of the Korean Chemical Society
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• 제35권1호
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• pp.35-38
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• 2014

Herein, we report on the preparation of red fluorescent Si nanoparticles stabilized with styrene. Nano-sized Si particles emit fluorescence under UV excitation, which could be used to open up new applications in the fields of optics and semi-conductor research. Unfortunately, conventional methods for the preparation of red fluorescent Si nanoparticles suffer from the lack of a fully-established standard synthesis protocol. A common initial approach during the preparation of semi-conductors is the etching of crystalline Si wafers in a HF/ethanol/$H_2O$ bath, which provides a uniformly-etched surface of nanopores amenable for further nano-sized modifications via tuning of various parameters. Subsequent sonication of the etched surface crumbles the pores on the wafer, resulting in the dispersion of particles into the solution. In this study, we use styrene to occupy these platforms to stabilize the surface. We determine that the liberated silicon particles in ethanol solution interact with styrene, resulting in the substitution of Si-H bonds with those of Si-C as determined via UV photo-catalysis. The synthesized styrene-coated Si nanoparticles exhibit a stable, bright, red fluorescence under excitation with a 365 nm UV light, and yield approximately 100 mg per wafer with a synthesis time of 2 h. We believe this protocol could be further expanded as a cost-effective and high-throughput standard method in the preparation of red fluorescent Si nanoparticles.

• 전기전자학회논문지
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• 제24권2호
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• pp.604-609
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• 2020

본 연구에서는 RF 스퍼터를 이용하여 SiC 기판위에 AlN막을 증착하고 급속 열처리 (RTA) 공정의 온도에 따른 AlN/4H-SiC 구조의 전기적, 재료적 특성에 대한 영향을 분석하였다. 400도에서 RTA 공정을 진행한 Ni/AlN/4H-SiC SBD 소자의 온/오프 비율은 RTA 공정 전 그리고 600도에서 RTA 공정을 한 소자에 비해 약 10배정도 높은 값을 가졌다. 또한 오제이 전자현미경을 통한 원자성분 분석을 통해 증착한 AlN 층내의 존재하는 산소의 양이 후열 처리 조건에 따라 변화함을 확인하였고 소자의 온/오프 비율 그리고 온-저항 등 소자의 성능에 영향을 주는 것을 분석하였다. 추가적으로, 제작한 소자의 노출된 음향 주파수에 따른 전기적 특성변화를 분석하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1996년도 추계학술대회 논문집
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• pp.71-74
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• 1996

Ta$_2$O$_{5}$ film ale recognized as promising capacitor dielectric for future DRAM\`s. The electrical properties of Ta$_2$O$_{5}$films greatly depend on the heating condition. In the practical fabrication process, several annealing process, such as the annealing of Al in H$_2$(about 40$0^{\circ}C$) and reflow of BPSG (borophosphosilicate glass) film in $N_2$(about 80$0^{\circ}C$), exist after deposition of Ta$_2$O$_{5}$ film. In this paper, we describe the temperature effect on the electrical properties of W/Ta$_2$O$_{5}$/Si structure. The thin film of Ta$_2$O$_{5}$ and tungsten have been deposited on p-si(100) wafer using the sputtering system. The heating temperature was varied from 500 to 90$0^{\circ}C$ in $N_2$for 30min and The degree of temperature is 100\`C. In a log(J/E$^2$) Vs 1/E plot of typical I-V data, we find a linear relationship for the temperature of 500, $600^{\circ}C$ and as deposition. This could indicate Fowler-Nordheim tunneling as the dominant mode of current transports. However, we can not find a linear relationship for the temperature above $700^{\circ}C$. This could not indicate Fowler-Nordheim tunneling as the dominant mode of current transport. The high frequency (1MHz) capacitance-voltage (C-V) of W/Ta$_2$O$_{5}$/Si Capacitor were investigated on the basis of shift in the threshold voltage and dielectric constant. The magnitude of the threshold voltage and dielectric constant depends on the heating temperature, and increases with heating temperature.temperature.

• 한국재료학회지
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• 제12권5호
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• pp.327-333
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• 2002

In order to obtain the oxidation layer for SiC MOS, the oxide layers by thermal oxidation process with dry and wet method were deposited and characterized. Deposition temperature for oxidation layer was $1100^{\circ}C$~130$0^{\circ}C$ by $O_2$ and Ar atmosphere. The oxide thickness, surface morphology, and interface characteristic of deposited oxide layers were measurement by ellipsometer, SEM, TEM, AFM, and SIMS. Thickness of oxidation layer was confirmed 50nm and 90nm to with deposition temperature at $1150^{\circ}C$ and $1200{\circ}C$ for dry 4 hours and wet 1 hour, respectively. For the high purity oxidation layer, the necessity of sacrificial oxidation which is etched for the removal of the defeats on the wafer after quickly thermal oxidation was confirmed.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권10호
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• pp.447-450
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• 2003

This paper presents a process optimization of antireflection (AR) coating on crystalline Si solar cells. Theoretical and experimental investigations were performed on a double-layer AR (DLAR) coating of MgF$_2$/CeO$_2$. We investigated CeO$_2$ films as an AR layer because they have a proper refractive index of 2.46 and demonstrate the same lattice constant as Si substrate. RF sputter grown CeO$_2$ film showed strong dependence on a deposition temperature. The CeO$_2$ deposited at 40$0^{\circ}C$ exhibited a strong (111) preferred orientation and the lowest surface roughness of 6.87 $\AA$. Refractive index of MgF$_2$ film was measured as 1.386 for the most of growth temperature. An optimized DLAR coating showed a reflectance as low as 2.04% in the wavelengths ranged from 0.4${\mu}{\textrm}{m}$ to 1.1${\mu}{\textrm}{m}$. We achieved the efficiencies of solar cells greater than 15% with 3.12% improvement with DLAR coatings. Further details on MgF$_2$, CeO$_2$ films, and cell fabrication parameters are presented in this paper.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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• pp.29-33
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• 2000

This paper describes on the temperature characteristics of a SDB(silicon-wafer direct bonding) SOI(silicon-on-insulator) Hall sensor. Using the buried oxide $SiO_2$ as a dielectrical isolation layer, a SDB SOI Hall sensor without pn junction isolation has been fabricated on the Si/$SiO_2$/Si structure. The Hall voltage and the sensitivity of the implemented SOI Hall sensor show good linearity with respect to the applied magnetic flux density and supplied current. In the temperature range of 25 to $300^{\circ}C$, the shifts of TCO(temperature coefficient of the offset voltage) and TCS(temperature coefficient of the product sensitivity) are less than ${\pm}6.7{\times}10^{-3}/^{\circ}C$ and ${\pm}8.2{\times}10^{-4}/^{\circ}C$, respectively. These results indicate that the SDB SOI structure has potential for the development of a silicon Hall sensor with a high-sensitivity and high-temperature operation.