• Title/Summary/Keyword: Bus operation

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A Voltage Bus Conditioner for a High Voltage DC Power Distribution System using High Performance Hysteresis Control (고성능 히스테리 제어를 이용한 고전압 DC 전력시스템을 위한 Voltage Bus Conditioner)

  • La, Jae-Du
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.56 no.2
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    • pp.90-98
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    • 2007
  • More and All-Electric Aircraft (AEA) carry many loads with varied functions. In particular, there may be large pulsed loads with short duty ratio, which can affect the normal operation of other loads. In this paper, a bi-directional converter with inductive storage is used as a voltage bus conditioner (VBC) to mitigate voltage transients on the bus. In addition, the constant frequency hysteresis control technique for a VBC is presented. A simple and fast prediction of the hysteresis band-width is implemented by the phase-lock loop control, keeping constant switching frequency. This technique offers the excellent dynamic response in load or parameter variation. The control performance is illustrated by simulated results with the SABER package, The proposed hysteresis control results in the shortest and the smallest excursions.

A Variable Hysteresis Control for a DC Bus Conditioner (DC Bus Conditioner을 위한 카변히스테리시스제어)

  • La, Jae-Du;Han, Moon-Seob
    • Proceedings of the KIEE Conference
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    • 2008.11a
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    • pp.472-475
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    • 2008
  • A DC distributed power system(DPS) has many loads with varied functions. In particular, there may be large pulsed toads with short duty ratio, which can affect the normal operation of other loads. In this paper, a bi-directional converts with inductive storage is used as a DC bus conditioner to damp voltage transients on the bus. In addition, the constant frequency hysteresis control technique for a DC bus conditioner is presented. A simple and fast prediction of the hysteresis band-width is implemented by the phase-lock loop control, keeping constant switching frequency. This technique offers the excellent dynamic response in load or parameter variation. The control performance is illustrated by simulated results with the SABER package. The proposed hysteresis control results in the shortest and the smallest excursions.

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Development of Bus Load Forecasting System based on Windows95 : Part I (윈도우즈95에 기초한 모선수요예측시스템의 개발(I))

  • Jeon, Dong-Hoon;Song, Seok-Ha;Lim, Joo-Il;Hwang, Kab-Ju
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.169-171
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    • 1996
  • In this paper, we have developed bus load forecasting system (BUSLOF) based on Windows 95. It has been developed for the secure operation of electric power system. It forecasts regional load and bus load using regional distribution factor(RDF) and bus distribution factor (BDF) which are calculated from bus load in the past. It is equipped with graphic user interface(GUI) which enables a user to easily access to the system. The performance of the developed system is estimated in sample data.

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Low Voltage Swing BUS Driver and Interface Analysis for Low Power Consumption (전력소모 감소를 위한 저 전압 BUS 구동과 인터페이스 분석)

  • Lee Ho-Seok;Kim Lee-Sup
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.7
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    • pp.10-16
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    • 1999
  • This paper describes a low voltage swing bus driver using FCSR(Feedback Control Swing voltage Reduction) which can control bus swing voltage within a few hundred of mV. It is proposed to reduce power consumption in On-chip interface, especially for MDL(Merged DRAM Logic) architecture wihich has wide and large capacitance bus. FCSR operates on differential signal dual-line bus and on precharged bus with block controlling fuction. We modeled driver and bus to scale driver size automatically when bus environment is variant. We also modeled coupling capacitance noise(crosstalk) of neighborhood lines which operate on odd mode with parallel current source to analysis crosstalk effect in the victim-line according as voltage transition in the aggressor-line and environment in the victim-line. We built a test chip which was designed to swing 600mV in bus, shows 70Mhz operation at 3.3V, using Hyundai 0.8um CMOS technology. FCSR operate with 250Mhz at 3.3V by Hspice simulation.

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Proposition of Desirable Management According to Characteristics of Various Bus Route Type (시내버스 노선별 특성 분석에 기초한 운행 개선 방안 연구: 공공성과 수익성을 고려하여)

  • Lee, Sang Yong;Jung, Hun Young
    • Journal of Korean Society of Transportation
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    • v.31 no.4
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    • pp.76-84
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    • 2013
  • The main objective of study was to determine the optimum level of bus service by bus route types for the effective improvement of bus route operating in semi-public transportation management. In pursuing the above, this study proposed to classify by bus route types based on publicity, profitability and potentiality. Using this methods of the classification, 113 bus routes in Busan were classified into bus routes of 8 types. And this study proposed desirable management of bus route operation according to 8 bus route types considering 9 bus operating characteristics such as bus route distance, operating number, state of passing through the CBD and so on. For proposing the desirable management, it was to do a statistical analysis of PCA(Principal Components Analysis) and to abbreviate 9 variables to 3. And it was drawn a conclusion effectively by making comparison between 8 bus rout types and 3 bus operating characteristics.

A study on sensing for abnormality of BUS BAR in motor control center (모터컨트롤센터의 BUS BAR 이상 감지를 위한 실험적 연구)

  • Kim, Sung-Dae
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.12
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    • pp.5838-5842
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    • 2011
  • The study mainly aims to explore how deterioration of motor control center, namely MCC, and vibration put impact on temperature of bus bar as well as temperature change of bolt-nut joint. The motor control center consists of three internal parts (i.e. R, S, T) which are for motor operation of high capacity. Two dimensional mechanism for measuring temperature was designed and manufactured with infrared temperature sensor. Installing it in inner motor control center enabled researcher to monitor temperature of bus bar as well as amount of change of current regularly. Temperature change of bus bar according to load was primarily examined based on a bolted joint in the experiment. It was clearly verified that temperature change of bus bar was proportional to current consumption. Therefore, installing non-contact two dimensional mechanism for measuring temperature in motor control center would be expected to prevent temperature rise owing to overload current and power outage as well as fire accident which can be triggered by poor electrical contact.

Estimation of City Bus Delay Element using Levenberg-Marquardt (Levenberg-Marquardt알고리즘을 이용한 시내버스 지연요소 추정)

  • Lee, Jin-Woo;Lee, Hyun-Mi;Lee, Hyeon-Soo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.3
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    • pp.493-498
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    • 2017
  • Recently, traffic data is analyzed for efficiency of bus operation, D2D(: Door to Door) service, and self-driving of public transportation. However, various studies have been carried out to predict the delay time of public transportation, especially buses, but the research to date has been insufficient due to limitations of simple analysis and data acquisition. In this study, delay time estimation is performed by collecting and processing data such as day of the week, weather, and time of day based on bus operation information. The proposed method in this paper can be applied to autonomous public transport and public traffic control system by improving the accuracy by adding variables in the future.

Analysis on Reliabilities of Seoul's Trunk Bus Lines Using BMS Data (through Data Envelopment Analysis) (BMS 자료를 이용한 서울시 간선버스의 정시성 분석(자료포락분석기법을 적용하여))

  • O, Mi-Yeong;Jeong, Chang-Yong;Son, Ui-Yeong
    • Journal of Korean Society of Transportation
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    • v.27 no.1
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    • pp.63-71
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    • 2009
  • The purpose of this paper is to identify unreliable routes in the view of users. After headway error ratio per route and travel time error ratio per route were calculated by using BMS data, reliability which incorporated two indicators each route was calculated through data envelopment analysis. Reliability among routes and among traffic zones was compared through the results, the needs to improve severely unreliable routes and to show passengers adjusted bus schedule information considering current reliability were suggested. As a future study, reliability evaluation framework of each route needs to be developed considering operation environment by analyzing bus card data (passengers and operation speed etc.) and pooly unreliable route should be managed strictly and reformed.

Development of Optimal Bus Scheduling Algorithm with Multi-constraints (다중제약을 고려한 최적 버스운행계획 알고리즘 개발)

  • Lee, Ho-Sang;Park, Jong-Heon;Jo, Seong-Hun;Yun, Byeong-Jo
    • Journal of Korean Society of Transportation
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    • v.24 no.7 s.93
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    • pp.129-138
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    • 2006
  • After Seoul has introduced semi-public bus management system(public management-private operation), the Seoul Metro Government needs a scientific management tool for optimal scheduling for bus routes, to reduce unnecessary operations and provide demand responsive service. As a product of this effort, this paper proposes a heuristic model that could minimize total passenger waiting time under the constraints, such as number of vehicles, working conditions, max load point, minimax headway. etc. For verifying the validity of the proposed model, it is applied to an existing bus route. It results that headways in rush hours become decreased and the passenger waiting time could be decreased. In conclusion. it is thought that the Proposed model contributes to efficiency of bus operation.

Bus and Registor Optimization in Datapath Synthesis (데이터패스 합성에서의 버스와 레지스터의 최적화 기법)

  • Sin, Gwan-Ho;Lee, Geun-Man
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.8
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    • pp.2196-2203
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    • 1999
  • This paper describes the bus scheduling problem and register optimization method in datapath synthesis. Scheduling is process of operation allocation to control steps in order to minimize the cost function under the given circumstances. For that purpose, we propose some formulations to minimize the cost function for bus assignment to get an optimal and minimal cost function in hardware allocations. Especially, bus and register minimization technique are fully considered which are the essential topics in hardware allocation. Register scheduling is done after the operation and bus scheduling. Experiments are done with the DFG model of fifth-order digital ware filter to show its effectiveness. Structural integer programming formulations are used to solve the scheduling problems in order to get the optimal scheduling results in the integer linear programming environment.

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