• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.800-803
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• 1996

This paper proposes the algorithm to solve emergency service restoration problems using efficient reconfiguration method in distribution system. In this algorithm, we try to avoid the blackout of important loads by considering service rank. It is possible to reconfigurate the system by using fuzzy inference results in which was reflected the expected distribution power, line capacity and service rank. A 27-bus, 32-branch model system is used to demonstrate the effectiveness of the proposed algorithm.

• Journal of KIISE:Software and Applications
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• v.35 no.2
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• pp.91-104
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• 2008

Service-Oriented Computing (SOC) is the development method that published services are selected and composed at runtime to deliver the expected functionality to service clients. SOC should get maximum benefits not only supporting business agility but also reducing the development time. Services are selected and composed at runtime to improve the benefits. However, current programming language, SOC platforms, business process modeling language, and tools support either manual selection or static binding of published services. There is a limitation on reconfiguring and redeploying the business process to deliver the expected services to each client. Therefore, dynamic selection is needed for composing appropriate services to service clients in a quick and flexible manner. In this paper, we propose Dynamic Selection Handler (DSH) on ESB. we present a design method of Dynamic Selection Handler which consists of four components; Invocation Listener, Service Selector, Service Binder and Interface Transformer. We apply appropriate design patterns for each component to maximize reusability of components. Finally, we describe a case study that shows the feasibility of DSH on ESB.

• Journal of Electrical Engineering and Technology
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• v.13 no.6
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• pp.2145-2157
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• 2018

Congestion Management (CM) is an attractive research area in the electrical power transmission with the power compensation abilities. Reconfiguration and the Flexible Alternating Current Transmission Systems (FACTS) devices utilization relieve the congestion in transmission lines. The lack of optimal power (real and reactive) usage with the better transfer capability and minimum cost is still challenging issue in the CM. The prediction of suitable place for the energy resources to control the power flow is the major requirement for power handling scenario. This paper proposes the novel optimization principle to select the best location for the energy resources to achieve the real-reactive power compensation. The parameters estimation and the selection of values with the best fitness through the Symmetrical Distance Travelling Optimization (SDTO) algorithm establishes the proper controlling of optimal power flow in the transmission lines. The modified fitness function formulation based on the bus parameters, index estimation correspond to the optimal reactive power usage enhances the power transfer capability with the minimum cost. The comparative analysis between the proposed method with the existing power management techniques regarding the parameters of power loss, cost value, load power and energy loss confirms the effectiveness of proposed work in the distributed renewable energy systems.

• Proceedings of the KSRS Conference
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• v.1
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• pp.271-273
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• 2006

In this paper, we describe the MI2U ORB function which is a part of the flight software executed on SCU and controls MI2U/MI which is one of three payloads on COMS. The MI2U ORB function manages MI2U/MI redundancy and reconfiguration, monitors MI2U/MI equipment, performs FDIR, and provides the routing service of commands from Ground/IP (Interpreted Program) through the current used 1553 channel. The MI2U hardware achieves the interface between the SCU and the MI. The MI2U is connected to SCU through MIL-STD-1553B system bus. The MI2U has the internal redundancy but is used in cold redundancy. The MI2U ORB function considers that they are not expected to be simultaneously switched on. The connection combination between MI2U and MI is electrically cross-strapped. However the MI2U ORB function considers only two combinations (MI2U A + MI 1, MI2U B + MI 2). Other combinations can be manually achieved by ground in case of the emergency case.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.472-475
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• 2005

This paper present a robot controller developed for shipbuilding yard. Since shipbuilding process handles large work pieces and has dusty and noisy environment, the developed controller has separated architecture into main control part and servo control part. Main control part is located in control room while servo control part is located near robot with work pieces. Commutation between two parts is done through SynqNet and RS485. Air purging system is adapted to servo control part for better reliability. We aimed open architecture in both hardware and software architecture. For open hardware architecture, we employed Compact PCI (cPCI) because it is widely used bus system and very reliable. Since lots of commercial boards are available with cPCI interface, upgrade and reconfiguration is easy. For open software architecture, Windows XP�� Embedded is selected as operating system (OS), because it is very popular OS and most hardware vender supports device driver for the windows XP.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.5
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• pp.80-87
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• 2003

Network reconfiguration in distribution systems is realized by changing the status of sectiona1izing switches, and is usually done for loss minimization or load balancing in the system This parer presents an approach for loss minization in distribution systems using reactive tabu search. Tabu search attempts to determine a better solution in the manner of a greatest-descent algorithm, but it can not give any guarantee for the convergence property. Reactive tabu search can give convergence property by using reaction and escape mechanism. Therefore, it can find global optimal solution regardless of initial system configuration. To demonstrate the validity of the proposed algorithm, numerical calculations are carried out the 32 bus system models.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.5
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• pp.94-102
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• 2003

This paper presents active management of feeder automation systems using active database. DAS(Distribution Automation System) has been managed for feeder automation in passive manner. Therefore, feeder automation system has to be managed by operator when feeder overloadings is detected. It may be possible for propagating the feeder overloadings area by operator's mistake. To overcome this defect, the author proposed the feeder automation technique with active manner to obtain feasible feeder reconfiguration. Active database can manage feeder automation system by data driven monitoring of events and by corresponding actions without operator's intervening. To manage feeder automation system with active manner, production rule, active rule manager are designed. And active database system architecture for feeder automation system is proposed. Test results on the KEPCO's 108 bus distribution system show that the performance is efficient and robust.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.55 no.9
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• pp.351-358
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• 2006

In this paper, DSPOCS(Digital Switchgear-Panel Operation and Control Solution) is designed, which is the intelligent inference based operation and control solution to obtain the safety and reliability of electric power supply in substation based on IED. DSPOCS is designed as a scheduled monitoring and control task and a real-time alarm inference task, and is interlinked with BRES(Bus Reconfiguration Expert System) in the required case. The intelligent alarm inference task consists of the alarm knowledge generation part and the real-time pattern matching part. The alarm knowledge generation part generates automatically alarm knowledge from DB saves it in alarm knowledge base. On the other hand, the pattern matching part inferences the real-time event by comparing the real-time event information furnished from IEDs of substation with the patterns of the saved alarm knowledge base.; Especially, alarm knowledge base includes the knowledge patterns related with fault alarm, the overload alarm and the diagnosis alarm. In order to design the database independently in substation structure, busbar is represented as a connectivity node which makes the more generalized graph theory possible. Finally, DSPOCS is implemented in MS Visual $C^{++}$, MFC, the effectiveness and accuracy of the design is verified by simulation study to the typical distribution substation.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.3
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• pp.277-286
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• 2000

Switch-based network is suitable for the environment of demanding high performance network. Traditional shared-medium Local Area Networks(LANs) do not provide sufficient throughput and latency. Specially, communication performance is more important with multimedia application. In these environments, switch-based network results in high performance. A kind of switch-based network provides higher bandwidth and low latency. Thus high-speed switch is essential to build switch-based LANs. An effective switch design is the most important factor of the switch-based network performance, and is required for the multicast message processing. In the previous cut-through switching technique, switch element reconfiguration has the capability of multicasting and deadlock-free. However, it has problems of low throughput as well as large scale of switch. Therfore, effective multicating can be implemented by using divided hardware unicast and multicast. The objective of this thesis is to suggest switch configuration with these features.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}