• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.109-112
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• 2000

The satellite communications are expected to play an important role to provide broadband multimedia services in the 21st century. According to this requirements, this paper describes the design and implementation of ATM-based high speed satellite modem ASIC chipset. The ASIC chip consists of three main parts, CODEC, Modulator and Demodulator. It supports burst and continuous mode operation with TDMA frame consisted of Reference bursts, Inbound burst, and Traffic burst. The maximum transmission rate is OC-3 (155Mbps) and the maximum operating clock speed is 220MHz. This ASIC chip was implemented with 0.25um CMOS technology.

• ETRI Journal
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• v.31 no.5
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• pp.622-624
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• 2009

This letter presents a compact 2.5 Gb/s burst-mode receiver using the first reported monolithic amplifier IC developed with 0.25 ${\mu}m$ SiGe BiCMOS technology. With optimum avalanche photodiode gain, the receiver module can obtain a fast response, high sensitivity and wide dynamic range, satisfying the overhead timing and various power specifications for a 2.5 Gb/s next-generation passive optical network (PON), as well as a legacy 1.25 Gb/s PON in the upstream.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.4
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• pp.24-31
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• 1995

In this paper, the dual-mode burst-error-correcting decoding algorithm is adapted to the multiple trellis-coded .pi./4 shift QPSK in order to achieve the improvement of bit error rate (BER) performance over fading channels. The dual-mode adaptive decoder which combines maximum likelihood decoding with a burst detection scheme usually operates as a Viterbi decoder and switches to time diversity error recovery whenever an uncorrectable error pattern is identified. Rayleigh fading channels and Rician fading channels having the Rician parameter K=5dB are used in computer simulation, and the simulation results are compared with those of interleaving techniques. It is shown that under the constraint of the fixed overall memory quantity, the dual-mode adaptive decoding scheme gains an advantage in the BER performance with respect to interleaving strategies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.12
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• pp.31-38
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• 2003

In this paper, we proposed a new structural AGC(Automatic Gain Control) circuit with extremely short settling time using high speed operation characteristics of a clipper. We investigated its operation characteristics in analysis. We also designed a burst-mode preamplifier for 1.25Gbps EPON systems using commercial foundry and investigated its characteristics by comparing the results of the designed and those of the analyzed. The characteristics of the designed circuit are in good agreement with those of the analyzed. As a result, it is shown that it is possible to realize extremely short settling time of under 1㎱.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.8
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• pp.1548-1557
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• 1994

In this paper, the dual mode error correcting adaptive decoding algorithm which is adapted to the continuous phase frequency shift keying(CPFSK) modulation is presented as a technique for overcoming the distortion that reveals from the Rayleigh fading channel. The dual mode adaptive decoder nominally operates as a Viterbi decoder and switches to the burst error correcting mode, whenever the decoder detects an uncorrectable burst error pattern. Under the fading channel environment and when the usable memory quantity is restricted, the dual mode adaptive decoding algorithm shows an advantage in the BER performance over the interleaving technique, and also obtains the merit of not needing the large time delay that the interleaving technique requires. The experimental results from the computer simulation demonstrate the performance of the algorithm and verify the theoretical results.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.1
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• pp.88-95
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• 2011

In this paper, a new standby-mode control method for multiple output switching-mode power-supply is suggested, which uses the control signal of the feedback compensator of the inner loop in the linear voltage regulator located at the transformer secondary side, as the load current information. Conventional method has a problem that standby mode occurs depending only on the load condition of the main controller output, which makes the other secondary side output very inaccurate by burst mode operation. The proposed method detects all the load current information and operates in burst mode only when the all of them are light load condition. Minimum of the additional components are required for the implementation of the proposed method because the load information is obtained from the existing feedback circuit of the post-stage linear regulator. In this paper, the operating principles of the proposed standby-mode circuit are presented with an numerical analysis, and are verified by 25W hardware prototype implementation.

• Journal of the Optical Society of Korea
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• v.11 no.1
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• pp.44-48
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• 2007

A two-stage gain-clamped erbium doped fiber amplifier (GC-EDFA) using a pump laser diode and a 16 channel wavelength division multiplexing (WDM) with 0.8 nm spacing in C band of $1,545{\sim}1,560nm$ wavelength is experimentally demonstrated for a burst packet mode optical switching system.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.2
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• pp.167-174
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• 2012

The circuits including with Optical transceiver and clock data recovery, in this paper, SERDES (SERializer-DESerializer) are implemented to construct a GE-PON burst-mode transceiver supporting IEEE 802.3ah and a jig for measuring the burst-mode characteristics, that is to say, PON upstream optical transmission environment are manufactured to evaluate the performance of transceiver. we verified that the limiting amplifier compensated the gap of max. 26dB optical power by experiments. The startup acquisition lock time is 670ns in case of using VSC7123 and 2300ns in case of S2060 and the data acquisition lock time were measured to be 400ns and 600ns, respectively, in the upstream channel transmission in this work. While on the other, VSC7123 is satisfied with IEEE802.3ah recommendations.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.4 no.2
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• pp.29-36
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• 2005

All-optical fiber-type $2{\times}32$ splitters for an Ethernet PON (passive optical network) were fabricated by using a FBT (fiber biconical tapered) process and the performance of the splitters was tested in upstream transmission of the EPON system. The $2{\times}32$ splitters was obtained by cascading $1{\times}4$ splitters fabricated by a conventional FBT process and showed -18 dB of insertion loss with 1.5 dB uniformity of output power at each channel and -0.1 dB of polarization dependent loss. The insertion loss variation was below 0.1 dB at the temperature range of $-40^{\circ}C\;to\;80^{\circ}C$. For upstream channel transmission test in the EPON system were a Zig board and a burst mode receiver. Zenko-made optical module was used for the burst mode receiver by adding functions of serializer/deserializer and clock data recovery, a Virtex II pro20 chipset and Vitesse VSC7123 were used in the Zig board for characterizing the burst mode and in the clock data recovery chipset, respectively. Startup acquisition lock time and data acquisition lock time were measured to be 670ns and 400ns, respectively, in the upstream channel transmission of the EPON system adapting the $2{\times}32$ splitter fabricated in this work.

• Korean Journal of Optics and Photonics
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• v.19 no.5
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• pp.343-348
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• 2008

This study was carried out to commercialize FTTH by developing a burst mode optical receiver for E-PON. The optical receiver was manufactured by minimizing the capacitance of a photodiode to improve sensitivity for meeting 10, 20 km OLT Rx standard of E-PON at the transmission speed of 1.25 Gb/s. When bit-error ratio is $10^{-12}$ and PRBS is $2^5-1$, sensitivity is -26 dBm, loud/soft ratio is 23 dB. Both preamble time and guard time were set to 102.4 ns (128 bit). After comparing a photodiode whose capacitance is 0.53 pF with another photodiode whose capacitance has been minimized to 0.26 pF, we could see that sensitivity improved to 0.7 dBm and so did bandwidth to 190 MHz of burst mode for the optical receiver manufactured by the photodiode whose capacitance is 0.26 pF.