Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

An Automatic Gain Control Circuit for Burst-mode Optical Signal reception

버스트 모드 광 신호 수신을 위한 자동 이득제어 회로

  • 기현철 (원광대학교 전자공학과)
  • Published : 2003.12.01
Download PDF
⟨ Previous Next ⟩

Abstract

In this paper, we proposed a new structural AGC(Automatic Gain Control) circuit with extremely short settling time using high speed operation characteristics of a clipper. We investigated its operation characteristics in analysis. We also designed a burst-mode preamplifier for 1.25Gbps EPON systems using commercial foundry and investigated its characteristics by comparing the results of the designed and those of the analyzed. The characteristics of the designed circuit are in good agreement with those of the analyzed. As a result, it is shown that it is possible to realize extremely short settling time of under 1㎱.

본 논문에서는 클리퍼(clipper)의 고속 동작 특성을 활용하여 자동 이득제어 회로의 정착시간(settling time)을 극히 짧게 구현할 수 있는 새로운 구조의 자동 이득제어 회로를 제안하였다. 제안한 자동 이득제어 회로에 대해서 해석적으로. 동작특성을 분석했다. 아울러 상용 파운드리(foundry)를 이용하여 1.2Gbps EPON 시스템용 버스트 모드 전치증폭회로를 설계하여 그 특성을 해석 결과와 비교 검증했다. 설계된 회로의 특성은 해석 결과와 잘 일치했으며 1㎱ 이하의 극히 짧은 정착시간(settling time)이 구현되고 있음을 확인 할 수 있었다

Keywords

References

  1. C. Y. Huang, Y. C. peng and C. K. Wang, 'A BiCMOS Automatic Gain Control Amplifier for SONET OC-3', Proc, Of IEEE Custom Integrated Circuits Conference, pp.103-106, 1995 https://doi.org/10.1109/CICC.1995.518146
  2. G. S. Sahota and C. J. Persico, 'High Dynamic Range Variable-Gain Amplifier for CDMA Wireless Applications', Proc. Of IEEE International Solid-State Circuits Conference, pp. 374-375, 1997 https://doi.org/10.1109/ISSCC.1997.585440
  3. P. Siniscalchi, A. Wyziyski and D. Choi, 'High Precision Programmable 1-10 MHz Bandwidth, 0-20 dB Gain Communication Channel For Digital Video Applications', Proc. Of IEEE Custom Integrated Circuits Conference, pp. 85-88, 1996 https://doi.org/10.1109/CICC.1996.510517
  4. W. A. Serdijn, A. C. Van de Woerd, J. Davidse and A. H. M. van Roermund, 'Low-Voltage Low-power Fully Integrated Automatic Gain Controls', Analog Integrated Circuits and Signal Processing, Vol.8, pp.131-143, 1995 https://doi.org/10.1007/BF01239106
  5. R. Harjarni, 'A Low-power CMOS VGA for 50Mb/s Disk Drive Read Channels', IEEE Transactions on Circuits and Systems, Vol.42, no. 6, pp. 370-376, June 1995 https://doi.org/10.1109/82.392312
  6. J. M. khoury, 'On the Design of Constant Settling Time AGC Circuits', IEEE Transac-tions on Circuits and Systems, Vol.45, no.3, pp. 283-294, March 1998 https://doi.org/10.1109/82.664234