• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.102-102
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• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.253-257
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• 2003

The low temperature flip chip technique is applied to the package of the temperature-sensitive devices for LCD systems and image sensors since the high temperature process degrades the polymer materials in their devices. We will introduce the various low temperature flip chip bonding techniques; a conventional flip chip technique using eutectic Bi-Sn (mp: $138^{\circ}C$) or eutectic In-Ag (mp: $141^{\circ}C$) solders, a direct bump-to-bump bonding technique using solder bumps, and a low temperature bonding technique using low temperature solder pads.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.195-196
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• 2010

• Journal of Welding and Joining
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• v.29 no.1
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• pp.52-58
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• 2011

In this paper, the direct bonding process between FPCB and HPCB was studied. By using an ultrasonic horn which is mounted on the ultrasonic bonding machine, it is alternatively possible to bond the gold pads attached on the FPCB and HPCB at room temperature without an adhesive like ACA or NCA. The process condition for obtaining more bonding strength than 0.6 Kgf, which is commercially required, was carried out as 40 kHz of frequency, 0.6 MPa of bonding pressure and 2 second of bonding time. The peel off test was performed for evaluating bonding strength which results in more than 0.8 Kgf.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.293-294
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• 2010

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1005-1008
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• 2003

We report a new FCOG (flip chip on glass) technique using solder bumps for display packaging applications. The In and Sn solder bumps of 40 ${\mu}m$ pitches were formed on Si and glass substrate. The In and Sn bumps were bonded at 125 at the pressure of 3 mN/bump. The metallurgical bonding was confirmed using cross-sectional SEM. The contact resistance of the solder joint was 65 $m{\Omega}$ which was much lower than that of the joint made using the conventional ACF bonding technique. We demonstrate that the new COG technique using solder bump to bump direct bonding can be applied to advanced LCDs that lead to require higher quality, better resolution, and lower power consumption.

• Journal of the Korean Society for Precision Engineering
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• v.32 no.9
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• pp.799-805
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• 2015

The further development of information, communication and digital media technologies requires the use of advanced, miniaturized semiconductor chips that operate at a high frequency. Die bonding and wire bonding methods for semiconductor packaging have been replaced by direct attachment to the substrate after forming a bump on the chip. However, the height of the bump or ball is an important factor for defects during assembly. This paper proposes an algorithm to measure the height of the bumps or balls in semiconductor packaging with greater accuracy. The performance of the proposed algorithm is experimentally validated. Non-contact 3D measurements of a shiny round ball is quite difficult, and it is not easy to obtain accurate data. This paper thus proposes an optical method and technique to improve the measurement accuracy.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.36 no.4
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• pp.395-403
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• 2012

This is direct bonding many of the metal bumps between FPCB and HPCB substrate. By using an ultrasonic horn mounted on an ultrasonic bonding machine, it is possible to bond gold pads onto the FPCB and HPCB at room temperature without an adhesive like ACA or NCA and high heat and solder. This ultrasonic bonding technology minimizes damage to the material. The process conditions evaluated for obtaining a greater bonding strength than 0.6 kgf, which is commercially required, were 40 kHz of frequency; 0.6MPa of bonding pressure; and 0.5, 1.0, 1.5, and 2.0 s of bonding time. The peel off test was performed for evaluating bonding strength, which was found to be more than 0.80 kgf.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.3
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• pp.661-669
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• 1999

A probe card is one of the most important pan of test systems as testing IC(integrated circuit) chips. This work was related to bump-type silicon vertical probe card which enabled simultaneous tests for multiple semiconductor chips. The probe consists of silicon cantilever with bump tip. In order to obtain optimum size of the cantilever, the dimensions were determined by FEM(finite element method) analysis. The probe was fabricated by RIE(reactive ion etching), isotropic etching, and bulk-micromachining using SDB(silicon direct bonding) wafer. The optimum height of the bump of the probe detemimed by FEM simulation was 30um. The optimum thickness, width, and length of the cantilever were 20 $\mum$, 100 $\mum$,and 400 $\mum$,respectively. Contact resistance of the fabricated probe card measured at contact resistance testing was less than $2\Omega$. It was also confirmed that its life time was more than 20,000 contacts because there was no change of contact resistance after 20,000 contacts.