• Journal of the Institute of Electronics Engineers of Korea CI
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• v.42 no.4 s.304
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• pp.59-68
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• 2005

In this paper, we design a PCI Express controller for future communication system The controller supports the full functionality of Transaction Layer and Data Link Layer of PCI Express. The designed controller has the proposed transmitter buffer architecture to obey Replay mechanism. This scheme merges the transmitting buffer and the replay buffer. The proposed buffer has the higher data transfer efficiency than the conventional buffer architecture because it can dynamically adjust size of a replay buffer space. We also design transmitter of Transmitter Transaction Layer to effectively support the proposed buffer, The receiver device of PCI Express must possess the buffer for three types of transaction to support Flow Control. And it must report the amount of the buffer space regularly to the Port at the opposite end of the link. We propose the simple receiver buffer scheme using only one buffer to easily support Flow Control. And the designed controller is verified under proposed test bench

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.10
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• pp.95-102
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• 2003

The buffering is a promising solution to resolve the contention problem in optical network. we study the packet loss probability and the dimensioning of optical buffer using a Fiber Delay Line for variable length packet. In this paper, we study the relation between the granularity and the loss of FDL buffer in Single-Stage FDL buffer and propose the Single-Bundle Multi-Stage FDL buffer. The Multi-Stage FDL buffer is too early yet to apply to the current backbone network, considering the current technology in view of costs. but we assume that the above restriction will be resolved in these days. The appropriate number of delay and pass line for a dimensioning is based on a amount of occupied time by packets. Once more another multi-stage FDL buffer is proposed, Split-Bundle multi-stage FDL buffer. The Split-Bundle ms-FDL buffer is more feasible for a FDL buffer structure, considering not only a size of switching matrix but also a bulk of switching element. its feasibility will be demonstrated from a loss probability.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.3_4
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• pp.205-212
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• 2003

In this paper, we propose a simple and efficient hardware-supported antialiasing algorithm and its rendering scheme. The proposed method can efficiently reduce the required memory bandwidth as well as memory size compared to a conventional supersampling when rendering 3D models. In addition, it can provide almost the same high quality scenes as supersampling does. In this paper, we have introduced the RUF (Recently Used Fragment) buffer that stores some or whole parts of a fragment or two more the merged results of fragments that recently used in color calculation. We have also proposed a color calculation algorithm to deteriorate the image quality as referencing the RUF buffer. Because of the efficiency presented in the proposed algorithm, the more number of sampling points increases the more memory saving ratio we can gain relative to the conventional supersampling. In our simulation, the proposed method can reduce the amount of memory size by 31% and the memory bandwidth by 11% with a moderate pixel color difference of 1.3% compared to supersampling for 8 sparse sampling points.

• Journal of KIISE:Databases
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• v.34 no.5
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• pp.379-388
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• 2007

Disordered streams may cause inaccurate or delayed results in window-based queries. Existing approaches usually leverage buffers to hand]e the streams. However, most of the approaches estimate the buffer size simply based on the maximum network delay in the streams, which tends to over-estimate the buffer size and result in high latency. In this paper, we propose a probabilistic approach to estimate the buffer size adaptively according to the fluctuated network delays. We first assume that intervals of tuple generations follow an exponential distribution and network delays have a normal distribution. Then, we derive an estimation function from the assumptions. The function takes a drop ratio as an input parameter, which denotes a percentage of tuple drops permissible during query execution. By describing the drop ratio in a query specification, users can control the quality of query results such as accuracy or latency according to application requirements. Our experimental results show that the proposed function has better adaptivity than the existing function based on the maximum network delay.

• Journal of KIISE
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• v.43 no.7
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• pp.820-826
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• 2016

There is a growing requirement for big data processing which extracts valuable information from a large amount of data. The Hadoop system employs the MapReduce framework to process big data. However, MapReduce has limitations such as inflexible and slow data processing. To overcome these drawbacks, SQL query processing techniques known as SQL-on-Hadoop were developed. Apache Tajo, one of the SQL-on-Hadoop techniques, was developed by a Korean development group. External merge sort is one of the heavily used algorithms in Tajo for query processing. The performance of external merge sort in Tajo is influenced by two parameters, sort buffer size and fanout. In this paper, we analyzed the performance of external merge sort in Tajo with various sort buffer sizes and fanouts. In addition, we figured out that there are two major causes of differences in the performance of external merge sort: CPU cache misses which increase as the sort buffer size grows; and the number of merge passes determined by fanout.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1995.04a
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• pp.435-444
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• 1995

We propose a new approach to the calculation of the exact cells loss probability in a shared buffer ATM multiplexer, which is loaded with homogeneous discrete-time ON-OFF sources. Renewal cycles are identified in regard to the state of input sources and the buffer state on each renewal circle is modelled as a K(shared buffer size)-state Markov chain. We also analyze the behavior of queue build-up at the shared buffer whose distribution together with the steady-state probabilities of the Markov chain leads to the exact cell loss probability. Our approach to obtaining the exact cell loss probability seems to be more efficient than most of other existing ones since our underlying Markov chain has less number of states.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.1
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• pp.36-42
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• 1997

This paper proposes a high-speed contention resolution scheme featuring high flexibility to the bursty traffic for an input buffering ATM switching architecture and its hardware strategy. The scheme is based on the threshold on the occupancy of the input buffer. As the proposed scheme utilizes the threshold, it has high flexibility to the fluctuations of the input traffic. The hardware strategy for the proposed policy is provided with the aim of the simple structure that achieves the reduction of the signal path and the power consumption. The performance on the average buffer size of the proposed policy is performed and compared with the conventional schame under the bursty traffic through both the analysis based on the markov hain and the simulation. The relations among the parameters on the proposed policy is analyzed to improve the performance.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.151-157
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• 1996

We propose a mechanism for the formation of pinholes in the Si-buffer layer, through the observations with varying the process- and structure variables in the SEPOX (selective poly-oxidation) process, an isolation method for sub-u DRAMs. Pinholes are formed through the accumulation of Si vacancies generated by the oxidation of Si, in which Si atoms leave the sites (vacancies) at the Si/SiO$_{2}$ interfaces and diffuse into the oxide to be oxidized near interface. In the course of the accumulation of Si-vacancies, the stress induced in the Si-buffer layer affects the migration of vacancies to result in the final size and distribution of pinholes. This paper may be, to our knowledge, the first report about the oxidation-induced pinhole in the Si/SiO$_{2}$ system.

• Journal of the Korean Mathematical Society
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• v.40 no.1
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• pp.87-107
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• 2003

In this paper, we consider a discrete time queueing system fed by a superposition of an ON and OFF source with heavy tail ON periods and geometric OFF periods and a D-BMAP (Discrete Batch Markovian Arrival Process). We study the tail behavior of the queue length distribution and both infinite and finite buffer systems are considered. In the infinite buffer case, we show that the asymptotic tail behavior of the queue length of the system is equivalent to that of the same queueing system with the D-BMAP being replaced by a batch renewal process. In the finite buffer case (of buffer size K), we derive upper and lower bounds of the asymptotic behavior of the loss probability as $K\;\longrightarrow\;\infty$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.7 no.3
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• pp.130-134
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• 1982

In computer communication network, it is assumed that blocks are served at a rate of u messages per sec. The message blocks will be stayed in the buffer during the service time. In this case, the probability density distribution of the number of message blocks in the buffer space has been studied. When the average buffer space needed is minimum, the average block size will be specified by the relation between the input data and link infromation length. This relation proves to be perfect. The random number generator for this probability distribution is designed. The test result by making use of the random number generator has shown that is has little difference from the theoretical one.