• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.363-364
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• 2016

In this paper, a novel bridgeless interleaved power factor correction circuit with single current sensor is proposed. The proposed control strategy requires only one current sensor for the interleaved bridgeless PFC. By sampling the output current, all the boost indictor currents can be calculated and used to control the input current according to the input voltage. The reduced number of current sensors and associated feedback circuits helps reduce the cost of system. The problem caused by the unequal current gain between current sensors inherently does not exist in the proposed topology. Thus, current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. In addition, the proposed technique can be applied to the other kinds of interleaved PFC topologies. Performance of the proposed control strategy is verified by the experimental results with 6.6kW bridgeless interleaved PFC circuit.

• Journal of Power Electronics
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• v.18 no.2
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• pp.323-331
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• 2018

Buck power factor correction (PFC) converters, compared with conventional boost PFC converters, exhibit high efficiency performance in the entire range of universal line voltage. This feature has gotten more attention for eliminating the zero crossing dead angle of buck PFC rectifiers. Furthermore, bridgeless structures for the reduction of conduction losses have been proposed. The aim of this paper is to introduce a single-phase buck rectifier that simultaneously has unity power factor (PF) and bridgeless structure while operating in the continuous conduction mode (CCM). For this purpose, two auxiliary flyback converters without any active switches are applied to a bridgeless buck rectifier to eliminate the zero crossing dead angle and achieve unity power factor, low total harmonic distortion (THD) and high efficiency. The operation and design considerations of the proposed rectifier are verified on a 150W, 48V prototype using a conventional peak-current-mode control. The measurement results show that the proposed rectifier has nearly unity power factor, THD less than 7% and high efficiency.

• Journal of Power Electronics
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• v.13 no.4
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• pp.600-608
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• 2013

This paper analyzes the effect of the admittance component for the digitally controlled single-phase bridgeless power factor correction (PFC) converter. To do this, it is shown how the digital delay effects such as the digital pulse-width modulation (DPWM) and the computation delays restrict the bandwidth of the converter. After that, the admittance effect of the entire digital control system is analyzed when the bridgeless PFC converter which has the limited bandwidth is connected to the grid. From this, the waveform distortion of the input current is explained and the compensation method for the admittance component is suggested to improve the quality of the input current. Both the simulations and the experiments are performed to verify the analyses taken in this paper for the 1 kW bridgeless PFC converter prototype.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.108-113
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• 2021

In this paper, a totem pole PFC was structured in two methods with FET and diode for low-speed switch while GaN FET was used for high-speed switch. Internal power loss, power conversion efficiency and steady-state characteristics of the two methods were compared in the totem pole bridgeless PFC circuit which is widely applied in large-capacity and high-efficiency switching rectifier of 500W or more. In order to compare and confirm the steady-state characteristics under equal conditions, a 2kW class totem pole bridgeless PFC was constructed and the experimental results were analyzed. From the experimental results, it was confirmed that the low-speed switch operation has a large difference in efficiency due to the internal conduction loss of the low-speed switch at a low input voltage. Especially, input power factor and load characteristic showed no difference regardless of the low-speed switch operation.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.4
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• pp.449-455
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• 2019

This paper proposes a flyback diode of bridgeless PFC converter as SiC SBD (Schottky Barrier Diode) to achieve high efficiency. In addition, through the explanation of the operation principle of the bridgeless PFC converter, the conduction section of the freewheel diode is shown in the bridgeless PFC converter to verify the contribution of system loss due to the loss of the freewheel diode. The advantages of the SiC SBD device's physical properties and the reverse recovery characteristics are explained, and the efficiency is measured by measuring the turn-on and turn-off losses. The loss was calculated. The simulation results were calculated in consideration of device characteristics and verified through the waveform analysis and comparison of the actual system. In order to consider the device characteristics, the simulation was conducted using the thermal module of PSIM. As a result of the prototype test, the turn-on loss was 0.608W and the turn-off loss was 21.62W, resulting in the total switching loss of 22.228W. The comparison of the two results proved the validity of the experimental method. In addition, a high efficiency of 94.58% is achieved.

• Journal of Power Electronics
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• v.14 no.5
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• pp.815-826
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• 2014

An improved bridgeless interleaved boost power factor correction (PFC) rectifier to improve power efficiency and component utilization is proposed in this study. With combined conventional bridgeless PFC circuit and interleaved technology, the proposed rectifier consists of two interleaved and magnetic inter-coupling boost bridgeless converter cells. Each cell operates alternatively in the critical conduction mode, which can achieve the soft-switching characteristics of the switches and increase power capacity. Auxiliary blocking diodes are employed to eliminate undesired circulating loops and reduce current-sensing noise, which are among the serious drawbacks of a dual-boost PFC rectifier. Magnetic component utilization is improved by symmetrically coupling two inductors on a unique core, which can achieve independence from each other based on the auxiliary diodes. Through the interleaved approach, each switch can operate in the whole line cycle. A simple control scheme is employed in the circuit by using a conventional interleaved controller. The operation principle and theoretical analysis of the converter are presented. A 600 W experimental prototype is built to verify the theoretical analysis and feasibility of the proposed rectifier. System efficiency reaches 97.3% with low total harmonic distortion at full load.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.24-25
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• 2017

In this paper, a low cost bridgeless interleaved power factor correction topology for electric vehicle charger application is proposed. With the proposed topology the number of switches, inductors, current sensors and associated circuits can be reduced, thereby reducing the cost of the system as compared to the conventional bridgeless PFC circuit. The reduced input current ripple by the proposed interleaved topology makes it suitable for high power applications such as electric vehicle chargers since it can reduce the size of the inductor core and the Electro Magnetic Interference (EMI) problem. In the proposed topology only one current sensor is required. All the boost inductor currents can be reconstructed by sampling the output current and used to control the input current. Therefore the typical problem caused by the unequal current gain of each current sensor inherently does not exist in the proposed topology. In addition the current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. The performance of the proposed converter is verified by the experimental results with a prototype of 6.6kW bridgeless interleaved PFC circuit.

• Journal of the Semiconductor & Display Technology
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• v.19 no.4
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• pp.22-27
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• 2020

In this paper, a generalized efficiency equation was proposed to estimate the internal loss of the SMPS (switched-mode power supply) with 3 variables. The first variable was an internal loss not related to the load current such as auxiliary power, the second was a loss proportional to the current such as diode loss, and the third was a loss proportional to square of the current such as conduction loss. Especially, theoretical internal losses of the totem pole bridgeless PFC which is widely used for high efficiency SMPS were expressed as output function to compare generalized efficiency equation. In addition, in order to reduce the conduction loss of the switch, when a multiple switch were paralleled, the correlation with the efficiency was analyzed and shown as a graph. In order to confirm the degree of the parallel switch structure on the efficiency improvement, a 2kW class totem pole bridgeless PFC was constructed and the effectiveness of the analysis was confirmed by comparing the generalized efficiency equation and theoretical loss analysis results with experimental data.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.463-464
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• 2014

본 논문은 LED 드라이버의 수명을 좌우하는 전해커패시터를 필름커패시터로 대체하기 위하여 출력맥동전류의 구형파 제어 방법을 제안한다. 출력맥동전류의 구형파 운전은 출력전류의 Peak to average ratio를 낮추어 출력커패시터의 용량을 감소시킬 수 있다. 일반적으로 전해커패시터의 1/20배의 용량 저감을 통하여 필름커패시터로 대체가 가능해진다. 본 논문에서 제안한 토폴로지는 bridgeless single-stage AC-DC LED드라이버의 구형파 전류제어에 따른 출력전류리플저감에 대한 내용을 다루었다.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.68-70
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• 2018

본 논문에서는 무선전력전송시스템에서 Double-sided와 semi-bridgeless 정류기의 통합모델링 및 설계를 제안한다. 제안한 방식은 통합 모델링을 통해 제어기설계가 가능하며, 이를 통해 추가 회로가 없이 안정적인 출력전압제어가 가능하다. 본 논문에서는 구현된 모델링의 유효성 및 제어기 설계를 시뮬레이션에서 전압지령 변경과 Rising time 비교를 통해 검증한다.