• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.143-144
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• 2005

Recently, MIM(metal-insulator-metal) capacitor is one of the essential device for DRAM device. In this thesis, $Al_2O_3$ thin film which has a relatively high dielectric constant was deposited by ALD(atomic layer deposition) using MPTMA and $H_2O$ source. Deposition temperature of $Al_2O_3$ thin film was $200^{\circ}C$ and its thickness was 300 ${\AA}$. $RuO_2$ bottom electrode was deposited by RF-magnetron sputtering using $RuO_2$ target. The physical characteristics of $Al_2O_3$ films were investigated by AES, TEM and Ellipsometry. Electrical characteristics were analyzed by C-V and I-V measurement.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.4
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• pp.41-54
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• 2002

In this study, we have analyzed the effects of the membrane layer and the bragg reflector layers on the resonance characteristics through comparing the characteristics of the membrane type FBAR (Film Bulk Acoustic Wave Resonator) and the one type bragg reflector layers with those of the ideal FBAR with top and bottom electrode contacting air by using equivalent circuit technique. It is assumed that ZnO is used for piezoelectric film, $SiO_2$ are used for membrane layer and low acoustic impedance layer, W are used for the high acoustic reflector layer and Al is used for the electrode. Each layer is considered to have a acoustic propagation loss. ABCD parameters are picked out and input impedance is calculated by converting 1-port equivalent circuit to simplified equivalent circuit that ABCD parameters are picked out possible. From the variation of resonance frequency due to the change of thickness of electrode layers, reflector layers and membrane layer it is confirmed that membrane layer and the reflector layer just under the electrode have the greatest effect on the variation of resonance frequency. From the variation of resonance properties, K and electrical Q with the number of layers, K is not much affected by the number of layers but electrical Q increases with the number of layers when the number of layers is less than seven. The electrical Q is saturated when the number of layers is large than six. The electrical Q is dependent of mechanical Q of reflector layers and membrane layer. Both ladder filter and SCF (Stacked Crystal Filters) show higher insertion loss and out-of-band rejection with the increase of the number of resonators. The insertion loss decreases with the increase of the number of reflector layers but the bandwidth is not much affected by the number of reflector layers. Ladder Filter and SCF with membrane layer show the spurious response due to spurious resonance properties. Ladder filter shows better skirt-selectivity characteristics in bandwidth but SCF shows better characteristics in insertion loss.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.4
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• pp.23-29
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• 2000

We demonstrate the fabrication method of high-density and high-quality solder bump solving a copper (Cu) cross-contamination in Si-LSI laboratory. The Cu cross-contamination is solved by separating solder-bump process by two steps. Former is via-formation process excluding Cu/Ti under ball metallurgy (UBM) layer sputtering in Si-LSI laboratory. Latter is electroplating process including Ti-adhesion and Cu-seed layers sputtering out of Si-LSI laboratory. Thick photoresist (PR) is achieved by a multiple coating method. After TiW/Al-electrode sputtering for electroplating and via formation in Si-LSI laboratory, Cu/Ti UBM layer is sputtered on sample. The Cu-seed layer on the PR is etched during Cu-electroplating with low-electroplating rate due to a difference in resistance of UBM layer between via bottom and PR. Therefore Cu-buffer layer can be electroplated selectively at the via bottom. After etching the Ti-adhesion layer on the PR, Sn/Pb solder layer with a composition of 60/40 is electroplated using a tin-lead electroplating bath with a metal stoichiometry of 60/40 (weight percent ratio). Scanning electron microscope image shows that the fabricated solder bump is high-uniformity and high-quality as well as symmetric mushroom shape. The solder bumps with even 40/60 $\mu\textrm{m}$ in diameter/pitch do not touch during electroplating and reflow procedures. The solder-bump process of high-uniformity and high-density with the Cu cross-contamination free in Si-LSI laboratory will be effective for electronic microwave application.

• Proceedings of the Korean Magnestics Society Conference
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• 2004.12a
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• pp.135-136
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• 2004

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.696-699
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• 2003

In this study, we suggested the model to precisely evaluate the ferroelectric hysteresis loop, using the modified Sawyer-Tower circuit and the ferroelectric capacitor with a MDFM(Metal-Dielectric-ferroelectric-Metal) structure. The mathematical expression of dipole polarization is applied to the numerical integration algorithm, and the fatigue property can be considered including the dielectric layer between ferroelectrics and bottom electrode. The validity of our model is proved comparing the estimated value of our model and the measured results of PLT(10) thin film.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.5
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• pp.424-428
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• 2010

This paper describes the design and analysis of AlN piezoelectric micro energy harvester. The harvester was designed to convert ambient vibration energy to electrical power as a AlN piezoelectric material compatible with CMOS (complementary metal oxide semiconductor) process. To cut off the leakage current, AlN was used as the insulating layer. Also, Mo was used for the excellent c-axis crystal growth as the bottom electrode. The AlN harvester which it has the low operating frequency was designed by using the ANSYS FEA (finite element analysis). From the simulation results, the resonance frequency of designed model is about 360 Hz and analyzed the bending mode, displacement and expectation output.

• Proceedings of the KIEE Conference
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• 2005.11a
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• pp.62-64
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• 2005

Indium Tim Oxide(ITO) thin film was prepared for TOLEDs by Facing Targets Sputtering(FTS) apparatus which can suppress the damage of organic layer due to the collisions of high energetic particles. In particular, ITO thin film was prepared with changing the distance between two targets for reduced the bombardment by high energetic particles such as ${\gamma}-electron$ or negative oxygen ions. The electrical and optical properties of ITO thin films as a function of distance of between two targets were measured. Additionally, the ITO thin films were prepared on the cell (cell : MgAg/LiF/EML/HTL/ bottom electrode) with distance of between two targets. And the I-V characteristics of ITO/cell was investigated.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.09a
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• pp.106-109
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• 2005

The ITO thin films for Top-Emitting Organic Light Emitting Devices (TOLEDs) were prepared on cell(LiF/Organic Layer/Bottom Electrode : ITO ) by FTS (Facing Targets Sputtering) system under different sputtering conditions which were varying gas pressure, input current and distance of target to target($D_{T-T}$). As a function of sputtering conditions, I-V characteristics of prepared ITO thin films on cell were measured by 4156A (HP). In the results, when the In thin films were deposited at $D_{T-T}$ 70mm and working pressure 1mTorr, the leakage current of ITO/cell was about 11[V] and 5E-6[$mA/cm^2$].

• Journal of the Semiconductor & Display Technology
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• v.4 no.2 s.11
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• pp.39-43
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• 2005

In the study, in order to deposit TaN thin film for diffusion barrier and bottom electrode we made the Plasma Assisted ALD equipment and confirmed the electrical characteristics of TaN thin films grown PAALD method. Plasma Assisted ALD equipment depositing TaN thin film using PEMAT(pentakis(ethylmethlyamino) tantalum) precursor and NH3 reaction gas is shown that TaN thin film deposited high density and amorphous phase with XRD measurement. The degree of diffusion and reaction taking place in Cu/TaN (deposited using 150W PAALD)/$SiO_{2}$/Si systems with increasing annealing temperature was estimated for MOS capacitor property and the $SiO_{2}$, (600${\AA}$)/Si system surface analysis by C-V measurement and secondary ion material spectrometer (SIMS) after Cu/TaN/$SiO_{2}$ (400 ${\AA}$) layer etching. TaN thin film deposited PAALD method diffusion barrier have a good diffusion barrier property up to 500$^{\circ}C$.

• 한국초전도학회:학술대회논문집
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• v.9
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• pp.63-66
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• 1999

We fabricated ramp-edge Josephson junctions with barriers formed by interface treatments instead of epitaxially grown barrier layers. Low-dielectric Sr$_2AITaO_6$(SAT) layer was used as an ion-milling mask as well as an insulating layer for the ramp-edge junctions. An ion-milled YBa$_2Cu_3O_{7-x}$ (YBCO)-edge surface was not exposed to solvent through all fabrication procedures. The barriers were produced by structural modification at the bottom YBCO edge using plasma treatment prior to deposition of the top YBCO electrode. We investigated the effects of pre-annealing and post-annealing on the characteristics of the interface-treated Josephson junctions. The junction parameters were improved by using in-situ RF plasma cleaning treatment.