• 제목/요약/키워드: Bm47

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On-chip Smart Functions for Efficiency Enhancement of MMIC Power Amplifiers for W-CDMA Handset Applications

  • Youn S. Noh;Kim, Ji H.;Kim, Joon H.;Kim, Song G.;Park, Chul S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제3권1호
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    • pp.47-54
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    • 2003
  • New efficiency enhancement techniques have been devised and implemented to InGaP/GaAs HBT MMIC power amplifiers for W-CDMA mobile terminals applications. Two different types of bias current control circuits that select the efficient quiescent currents in accordance with the required output power levels are proposed for overall power efficiency improvement. A dual chain power amplifier with single matching network composed of two different parallel-connected power amplifier is also introduced. With these efficiency enhancement techniques, the implemented MMIC power amplifiers presents power added efficiency (PAE) more than 14.8 % and adjacent channel leakage ratio(ACLR) lower than -39 dBc at 20 dBm output power and PAE more than 39.4% and ACLR lower than -33 dBc at 28 dBm output power. The average power usage efficiency of the power amplifier is improved by a factor of more than 1.415 with the bias current control circuits and even up to a factor of 3 with the dual chain power amplifier.

MEMS 임베디드 시스템 설계 (MEMS Embedded System Design)

  • 홍선학
    • 디지털산업정보학회논문지
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    • 제18권4호
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    • pp.47-54
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    • 2022
  • In this paper, MEMS embedded system design implemented the sensor events via analyzing the characteristics that dynamically happened to an abnormal status in power IoT environments in order to guarantee a maintainable operation. We used three kinds of tools in this paper, at first Bluetooth Low Energy (BLE) technology which is a suitable protocol that provides a low data rate, low power consumption, and low-cost sensor applications. Secondly LSM6DSOX, a system-in-module containing a 3-axis digital accelerometer and gyroscope with low-power features for optimal motion. Thirdly BM1422AGMV Digital Magnetometer IC, a 3-axis magnetic sensor with an I2C interface and a magnetic measurable range of ±120 uT, which incorporates magneto-impedance elements to detect the magnetic field when the current flowed in the power devices. The proposed MEMS system was developed based on an nRF5340 System on Chip (SoC), previously compared to the standalone embedded system without bluetooth technology via mobile App. And also, MEMS embedded system with BLE 5.0 technology broadcasted the MEMS system status to Android mobile server. The experiment results enhanced the performance of MEMS system design by combination of sensors, BLE technology and mobile application.

고해상도 능동 위상 배열 영상 레이더를 위한 고안정 송수신 시스템 개발 및 성능 보정 연구 (Development and Performance Compensation of the Extremely Stable Transceiver System for High Resolution Wideband Active Phased Array Synthetic Aperture Radar)

  • 성진봉;김세영;이종환;전병태
    • 한국전자파학회논문지
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    • 제21권6호
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    • pp.573-582
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    • 2010
  • 본 논문에서는 고해상도 광대역 영상 레이더용 X-대역 송수신기를 설계, 제작하고 성능 보정을 위한 연구를 수행하였다. 영상 레이더용 송수신기는 송신기, 수신기, 송수신 경로기 및 주파수 발생기로 구성되며, 특히 수신기는 지상 이동 표적 탐지를 위한 2 채널 모노펄스 구조를 가진다. 송수신기는 운용 모드에 따라 고해상도 모드를 위한 deramping 수신 기능을 제공하며, SAR 운용 모드에 적합하게 수신 대역폭 선택 기능을 가진다. 송수신기는 X-대역에서 300 MHz 이상의 대역폭을 가지며, T/R 모듈을 구동시키기에 적합하도록 송신 출력은 13.3dBm이며, 수신 이득은 39 dB, 잡음 지수는 3.96 dB 이하인 성능을 얻었다. 수신 이득은 6 비트 디지털 감쇠기에 의해 제어되며, 이득 조절 범위는 30 dB를 보였다. 수신 동적 범위는 30 dB이며, 수신 I/Q 채널 간 진폭 오차는 ${\pm}$0.38 dB 이내, 위상 오차는 ${\pm}$3.47도 이내를 보였다. 시험 결과, 송수신기는 영상 레이더에서 요구되는 전기적인 성능을 만족하였으며, 또한 영상 레이더의 성능을 크게 좌우하는 펄스 오차 항목이 분석되었으며, 임펄스 응답 특성을 개선하기 위한 보정 기법을 적용하여 개발 목표 규격을 만족하는 것을 확인하였다.

Swinging Effect of Salicylic Acid on the Accumulation of Polyhydroxyalkanoic Acid (PHA) in Pseudomonas aeruginosa BM114 Synthesizing Both MCL- and SCL-PHA

  • Rho, Jong-Kook;Choi, Mun-Hwan;Shim, Ji-Hoon;Lee, So-Young;Woo, Myeong-Ji;Ko, Bong-Sung;Chi, Ki-Whan;Yoon, Sung-Chul
    • Journal of Microbiology and Biotechnology
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    • 제17권12호
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    • pp.2018-2026
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    • 2007
  • A bacterium, Pseudomonas aeruginosa BM114, capable of accumulating a blend of medium-chain-length (MCL)- and short-chain-length (SCL)-polyhydroxyalkanoic acid (PHA), was isolated. Salicylic acid (SA), without being metabolized, was found to specifically inhibit only the accumulation of MCL-PHA without affecting cell growth. An addition of 20 mM SA selectively inhibited the accumulation of MCL-PHA in decanoate-grown cells by 83% of the control content in one-step cultivation, where overall PHA accumulation was inhibited by only ${\sim}11%$. Typically, the molar monomer-unit ratio of the PHA for 25 mM decanoate-grown cells changed from 46:4:25:25 (=[3-hydroxybutyrate]:[3-hydroxycaproate]: [3-hydroxyoctanoate]:[3-hydroxydecanoate]) at 0 mM SA (dry cell wt, 1.97 g/l; PHA content, 48.6 wt%) to 91:1:4:4 at 20 mM SA (dry cell wt, 1.85 g/l; PHA content, 43.2 wt%). Thus, the stimulation of SCL-PHA accumulation was observed. Growth of P. aeruginosa BM114 on undecanoic acid also produced a PHA blend composed of 47.4% P(3HB-co-3-hydroxyvalerate) and 52.6% P(3-hydroxyheptanoate-co-3-hydroxynonanoate-co-3-hydroxyundecanoate). Similar to the case of even-carboxylic acids, SA inhibited the accumulation of only MCL-PHA, but stimulated the accumulation of SCL-PHA. For all medium-chain fatty acids tested, SA induced a stimulation of SCL-PHA accumulation in the BM114 strain. SA could thus be used to suppress only the formation of MCL-PHA in Pseudomonas spp. accumulating a blend of SCL-PHA and MCL-PHA.

능동-가중치 전하 샘플링을 이용한 고차 시간상 이동평균 필터 (High-Order Temporal Moving Average Filter Using Actively-Weighted Charge Sampling)

  • 신수환;조용호;조성훈;유형준
    • 대한전자공학회논문지SD
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    • 제49권2호
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    • pp.47-55
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    • 2012
  • 본 논문에서는 능동-가중치 전하 샘플링을 이용하는 고차의 시간상 이동평균 필터가 제안된다. 샘플링되는 전하의 비율을 바꾸기 위해서 가변 트랜스컨덕턴스 증폭기(variable transconductance OTA)가 전하 샘플러 앞단에 사용되며, 전하의 비율은 OTA의 제어 트랜지스터들을 스위칭하여 효과적으로 변하게 된다. 그 결과, 능동-가중치 샘플링을 이용하는 고차의 시간상 이동평균 연산이 가능해진다. 또한, OTA의 트랜스컨덕턴스는 제어 트랜지스터들의 크기를 통해 비율이 조절되므로 비교적 정확하며 공정 변화에 안정적이다. 고차의 시간상 이동평균 필터는 소수의 스위치와 샘플링 커패시터를 사용하므로 작은 크기와 높은 전압 이득을 가지며 기생 성분의 발생을 줄일 수 있다. 제안된 고차의 시간상 이동평균은 2차-2입력 시간상 이동평균 (TMA-$2^2$) 필터로 TSMC $0.18-{\mu}m$ CMOS 공정을 이용하여 구현되었다. 설계된 필터의 전압 이득은 약 16.7 dB이며 P1dB와 IIP3는 각각 -32.5 dBm과 -23.7 dBm으로 시뮬레이션된다. 출력 버퍼를 포함한 전체 직류 전류 소모는 약 9.7 mA이다.

A High Gain and High Harmonic Rejection LNA Using High Q Series Resonance Technique for SDR Receiver

  • Kim, Byungjoon;Kim, Duksoo;Nam, Sangwook
    • Journal of electromagnetic engineering and science
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    • 제14권2호
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    • pp.47-53
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    • 2014
  • This paper presents a high gain and high harmonic rejection low-noise amplifier (LNA) for software-defined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the in-band signal voltage and attenuate the out-band signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a $0.13-{\mu}m$ CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain ($S_{21}$) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between -5.7 and -10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2-V supply.

열잡음 메모리 효과 제거기를 이용한 전력증폭기의 효율 개선 (The Design of Power Amplifier using Temperature Memory Effect Compensation)

  • 고영은;이지영
    • 정보학연구
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    • 제10권3호
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    • pp.47-58
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    • 2007
  • In this paper, we designed and manufactured the distortion-cancellation module which is able to compensate thermal-noise distortion by software. The distortion-cancellation algorithm not only bring forth system non-linear distortion by input level but also bring compensate component of distortion by thermal to get rid off distortion from now on. After TMS 320C6711 DSP to recognize our algorithm, we manufactured the module for every kinds of system. To evaluate efficiency of the distortion-cancellation module, we designed and manufactured communication system. By measured result, if system output power is -3dBm equally, 12dB of ACLR has improved in 1MHz away from a center frequency, and also gain has increased up to 0.5dB.

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고조파 억압 특성을 개선한 병렬 궤환형 유전체 공진기 발진기 설계 (Design of Parallel Feedback Dielectric Resonator Oscillator(DRO) for the Suppression of the Harmonic)

  • 고정필;이건준;김영식
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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    • pp.145-149
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    • 2003
  • The parallel feedback dielectric resonator oscillator (DRO) which is applicable to satellite communications and broadcasting has been investigated. In the design of oscillator, the phase noise is important parameter. In this paper, The proposed oscillator has good phase noise level because it suppressed harmonics. Measurement show the fabricated oscillator is output power of about 9 dBm at fundamental frequency of 12.0 GHz and fundamental frequency suppression of -47.5 dBc. The phase noise level is about -110 dBc/Hz at 100 KHz offset frequency.

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피드포워드 방식을 이용한 PCS 대역 선형 증폭기의 설계 (Design of a PCS Band Linear Power Amplifier Using Feedforward Approach)

  • 김윤호;정재웅
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.118-123
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    • 2001
  • For multi-carrier communication system, power amplifier generate intermodulation products caused by their nonlinear characteristics. Intermodulation products arised around the carrier frequency cannot be filtered out, operate as noise source for tile adjacent channel and thus degrades the quality of communication. In this paper, the 1850MHz-band RF linear power amplifier has been designed and fabricated with feedforward loop. The error signal loop consists of several key components such as phase shifter and attenuator, subtracter. The proposed Linearizer was tested with two-tone signals separated 10MHz apart at the center frequency of 1850MHz. The experimental results show C/I improvement by 14.5${\~}$20dB over 15dB dynamic range(33${\~}$47.8dBm) which gave IMD of 53.25${\~}$59dBc for the designed LPA.

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3GPP LTE를 위한 다중대역 90nm CMOS 저잡음 증폭기의 설계 (Design of a Multi-Band Low Noise Amplifier for 3GPP LTE Applications in 90nm CMOS)

  • 이성구;신현철
    • 대한전자공학회논문지SD
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    • 제47권5호
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    • pp.100-105
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    • 2010
  • 3GPP LTE (3rd Generation Partner Project Long Term Evolution)에 적용할 수 있는 다중대역 저잡음 증폭기를 90 nm RF CMOS 공정을 이용하여 설계하였다. 설계된 다중대역 저잡음 증폭기는 1.85-2.8 GHz 주파수 범위내의 8개 대역으로 분리돼서 동작하며, 다중대역에서의 성능 최적화를 위해 증폭기 입력단에 다중 캐패시터 어레이를 이용하여 대역에 따른 조정이 되도록 하였다. 입력 신호의 변화에 따른 증폭기의 포화를 방지하기 위해 Current Steering을 이용한 바이패스 모드를 구현하였다. 설계된 저잡음 증폭기는 1.2 V의 공급 전원에서 17 mA를 소모한다. RF 성능은 PLS (Post Layout Simulation)을 통해 검증하였다. 정상상태에서 전력이득은 26 dB, 바이패스모드에서의 전력이득은 0 또는 -6.7 dB를 얻었다. 또한, 잡음지수는 1.78dB, IIP3는 최대 이득 일 때 -12.8 dBm을 가진다.