• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.4
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• pp.401-404
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• 2010

In multibit Sigma-Delta Modulator, DWA(Data Weighted Averaging) among the DEM(Dynamic Element Matching) techniques was widely used to get rid of non-linearity that caused by mismatching of unit capacitor in feedback DAC path. this paper proposed the improved DWA architecture by adjusting clock timing of the existing DWA architecture. 2n Register block used for output was replaced with 2n S-R latch block. As a result of this, MOS Tr. can be reduced and extra clock can also be removed. Moreover, two n-bit Register block used to delay n-bit data code is decreased to one n-bit Register. In order to confirm characteristics, DWA for the 3-bit output with the proposed DWA architecture was designed on 0.18um process under 1.8V supply. Compared with the existing architecture. It was able to reduce the number of 222 MOS Tr.

• ETRI Journal
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• v.30 no.4
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• pp.506-515
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• 2008

The H.264/AVC standard has adopted new coding tools such as intra-prediction, variable block size, motion estimation with quarter-pixel-accuracy, loop filter, and so on. The adoption of these tools enables an H.264/AVC-coded bitstream to have more information than was possible with previous standards. In this paper, we propose an effective spatial error concealment method with low complexity in H.264/AVC intra-frame. From information included in an H.264/AVC-coded bitstream, we use prediction modes of intra-blocks to recover a damaged block. This is because the prediction direction in each prediction mode is highly correlated to the edge direction. We first estimate the edge direction of a damaged block using the prediction modes of the intra-blocks adjacent to a damaged block and classify the area inside the damaged block into edge and flat areas. Our method then recovers pixel values in the edge area using edge-directed interpolation, and recovers pixel values in the flat area using weighted interpolation. Simulation results show that the proposed method yields better video quality than conventional approaches.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.5
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• pp.1299-1309
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• 1998

In this paper, we propose a new approach for reducing the blocking artifact that is one of drawbacks of the block-based Discrete Cosine Transform (DCT) without introducing additional information or significant blurring. We modify the inter-block discontinuity minimization technique to preserve edges within a block as well as to reduce visible block boundaries. The homogeneity of each block is decided by the threshold value reated to Q-factor, which is included in a JPEG as well as MPEG streams. The quantization error is estimated by minimizing the discontinuity, which is weighted in proportion to block discontinuity and added to each pixel in the block to compensate block artifacts. The proposed algorithm reconstructs images which have less noticeable block boundaries from a subjective viewpoit without anyconstraints.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.5
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• pp.18-24
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• 2011

In multibit Sigma-Delta Modulator, one of the DEM(Dynamic Element Matching) techniques which is DWA(Data Weighted Averaging) is widely used to get rid of non-linearity caused by mismatching of capacitor that is unit element of feedback DAC. In this paper, by adjusting clock timing used in existing DWA architecture, 2n Register block used for output was replaced with 2n S-R latch block. As a result of this, MOS Tr. can be reduced and extra clock can also be removed. Moreover, two n-bit Register block used to delay n-bit data code is decreased to one n-bit Register. After designing the 3rd 3-bit SC(Switched Capacitor) Sigma-Delta Modulator by using the proposed DWA architecture, 0.1% of mismatching into unit element in input frequency 20 kHz and sampling frequency 2.56 MHz. As a consequence of the simulation, It was able to get the same resolution as the existing architecture and was able to reduce the number of MOS Tr. by 222.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.8
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• pp.2626-2646
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• 2014

This study presents a power and Physical Resource Blocks (PRBs) joint allocation algorithm to coordinate uplink (UL) interference in the device-to-device (D2D) underlaying Long Term Evolution-Advanced (LTE-A) networks. The objective is to find a mechanism to mitigate the UL interference between the two subsystems and maximize the weighted sum throughput as well. This optimization problem is formulated as a mixed integer nonlinear programming (MINLP) which is further decomposed into PRBs assignment and transmission power allocation. Specifically, the scenario of applying imperfect channel state information (CSI) is also taken into account in our study. Analysis reveals that the proposed PRBs allocation strategy is energy efficient and it suppresses the interference not only suffered by the LTE-A system but also to the D2D users. In another side, a low-complexity technique is proposed to obtain the optimal power allocation which resides in one of at most three feasible power vectors. Simulations show that the optimal power allocation combined with the proposed PRBs assignment achieves a higher weighted sum throughput as compared to traditional algorithms even when imperfect CSI is utilized.

• ETRI Journal
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• v.34 no.5
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• pp.795-798
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• 2012

This letter proposes a new low-complexity motion estimation method. The proposed method classifies various nonmatching pixel pairs into several categories and assigns an appropriate weight for each category in the matching stage. As a result, it can significantly improve performance compared to that of the conventional methods by adding only one 1-bit addition and two Boolean operations per pixel.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.9
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• pp.650-656
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• 2004

This paper presents block and timing diagrams of the DWA(data weighted averaging) to optimize a feedback time delay of the sigma-delta modulator. Through the Matlab modeling, the optimized coefficients of the integrators are obtained to design the modulator. And then the fully differential SC integrators, feedback DAC, 9-level quantizer, and DWA are designed by considering the nonideal characteristics of the modulator. The designed second-order multibit modulator is fabricated in a 0.35$\mu\textrm{m}$ CMOS process. The designed modulator achieves 73dB signal-to-noise ratio and 72dB dynamic range at 1.2Vp-p 585kHz input singal and 52.8MHz sampling frequency.

• Korean Management Science Review
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• v.24 no.2
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• pp.115-126
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• 2007

Weekly minima of daily log returns of Korean composite stock price index 200 and its five industry-based business divisions over the period from January 1990 to December 2005 are fitted using two block-based extreme distributions: Generalized Extreme Value(GEV) and Generalized Logistic(GLO). Parameters are estimated using the probability weighted moments. Applicability of two distributions is investigated using the Monte Carlo simulation based empirical p-values of Anderson Darling test. Our empirical results indicate that both the GLO and GEV models seem to be comparably applicable to the weekly minima. These findings are against the evidences in Gettinby et al.[7], who claimed that the GEV model was not valid in many cases, and supported the significant superiority of the GLO model.

• Journal of the Korean Professional Engineers Association
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• v.16 no.4
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• pp.15-19
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• 1983

Therefore the use of Hadamard transform in the image processing requires only the real number operations and results in the computational advantages. Recently, however, certain degradation aspects have been reported. In this paper we propose a WH matrixtwhich retains the main properties of Hadamard matrix. The actual improvement of the image transmission in the inner part of the picture has been demonstrated by the computer simulated image developments. The orthogonal transforms such as Hadamard transform offers a useful facility in the digital signal processing. As the size of the transmission block increases, however, the assignment of bits for each data must increase exponentially. Thus the SNR of the image tends to decline accordingly. As an attempt to increase the SNR, we propose the WH matrix whose elements are made of ${\pm}$1, ${\pm}$2, ${\pm}$3, ${\pm}$4, and the unitform is 8${\times}$8 matrix.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.49 no.2
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• pp.61-68
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• 2012

This paper describes a normalized numeric image descriptor used to assess the luminance and contrast of the image. The proposed image descriptor used the each pixel data as weighted value of the probability density function (PDF) and defined by normalization in order to objective represent. The proposed image numeric descriptor can be used to the adaptive gamma process because it suggests the objective basis of the gamma value selection.