• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.7 no.2
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• pp.331-339
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• 2017

This paper proposes a thread pool management technique of an websocket server that is applicable to embedded systems. WebSocket is a proposed technique for consisting a dynamic web, and is constructed using HTML5 and jQuery. Various studies have been progressing to construct a dynamic web by Apache, Oracle and etc. Previous web service systems require high-capacity, high-performance hardware specifications and are not suitable for embedded systems. The node.js which is consist of HTML5 and jQuery is a typical websocket server which is made by open sources, and is a java script based web application which is composed of a single thread. The node.js has a limitation on the performance for processing a high velocity data on the embedded system. We make up a multi-thread based websoket server which can solve the mentioned problem. The thread pool is managed by a bit register and suitable for embedded systems. To evaluate the performance of the proposed algorithm, we uses JMeter that is a network test tool.

• Journal of Korea Society of Industrial Information Systems
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• v.20 no.1
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• pp.1-7
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• 2015

In this paper, a 12-bit high resolution, power and area efficiency hybrid digital pulse width modulator (DPWM) with process and temperature (PT) calibration has been proposed for digital controlled DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential tapped delay line ring-mux digital-to-time converter (DTC) schema and a 6-bit counter-comparator DTC schema, resulting in a power and area saving solution. Furthermore, since the 6-bit differential delay line ring oscillator serves as the clock to the high 6-bit counter-comparator DTC, a high frequency clock is eliminated, and the power is significantly saved. In order to have a simple delay cell and flexible delay time controllability, a voltage controlled inverter is adopted to build the deferential delay cell, which allows fine-tuning of the delay time. The PT calibration circuit is composed of process and temperature monitors, two 2-bit flash ADCs and a lookup table. The monitor circuits sense the PT (Process and Temperature) variations, and the flash ADC converts the data into a digital code. The complete circuits design has been verified under different corners of CMOS 0.18um process technology node.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.8
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• pp.671-677
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• 2016

A Controller Area Network (CAN) is a serial communication protocol that is highly reliable and efficient in many aspects, such as wiring cost and space, system flexibility, and network maintenance. Therefore, it is chosen for the communication protocol between a single chip controller based on Field Programmable Gate Array (FPGA) and peripheral devices. In this paper, the design and implementation of CAN IP, which is written in VHSIC Hardware Description Language (VHDL), is presented. The implemented CAN IP is based on the CAN 2.0A specification. The CAN IP consists of three processes: clock generator, bit timing, and bit streaming. The clock generator process generates a time quantum clock. The bit timing process does synchronization, receives bits from the Rx port, and transmits bits to the Tx port. The bit streaming process generates a bit stream, which is made from a message received from a micro controller subsystem, receives a bit stream from the bit timing process, and handles errors depending on the state of the CAN node and CAN message fields. The implemented CAN IP is synthesized and downloaded into SmartFusion FPGA. Simulations using ModelSim and chip test results show that the implemented CAN IP conforms to the CAN 2.0A specification.

• The Journal of the Korea Contents Association
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• v.6 no.7
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• pp.69-78
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• 2006

In this paper, we presents the efficiency and a transmission quality of the system which is composed of the optical elements from physical layer of the active optical ring network. For a simulation it will use the Transmissionmaker WDM and it will be able to observation a optical transmission quality of the optical transmission system. The active optical network is composed of two rings(main ring and sub-ring). It measures the BER(Bit Error Rate) quality which it follows node number from the sub ring and physical distance of the node. Performance analysis from the physical layer becomes the standard of the plan for the efficiency optimization of the active optical ring network. Consequently it will be able to compose the efficient optical transmission system which reflects the physical distance, a traffic demand quantity of each node and a number of users from actual network.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.47-52
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• 2017

In this paper, CMOS SAR A/D converter 1.8V supply for the design of an A/D converter having an middle speed for the biological signal processing was designed. This paper proposes design of a 10-bit SAR Analog to Digital Converter improving linearity driven by MSB node of C-DAC array divided into 4 equal parts. It enhances linearity property, by retaining the analog input signal charging time at MSB node. Because MSB node samples analog input, it enhances resolution through getting initial input signal precisely. By using split capacitor on C-DAC array, it reduced chip size and power dissipation. The Proposed SAR A/D Converter is fabricated in 0.18um CMOS and measured 7.5 bits of ENOB at sampling frequency 4MS/s and power supply of 1.8V. It occupies a core area of $850{\times}650um^2$ and consumes 123.105uW. Therefore it results in 170.016fJ/step of FOM(Figure of Merit).

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.133-136
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• 2001

In this work, the problem of regulating and tracking available bit rate (ABR) traffic in ATM network. The issue of providing control signals to throttled sources at distant location from bottlenecked node is of particular interest. Network modeling and design of controller is outlined. To obtain optimal control, receding horizon control (RHC) theory is applied. Simulation results are presented in views of regulation and tracking problems with or without constraints.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.3
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• pp.445-450
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• 2020

Cooperative networks provides the benefits of performance improvements and capacity increment when the source node transmits signal to the destination node using several relay nodes. In this paper, we consider the cooperative network where the transmission scheme between the source node and relay node use conventional binary signaling, whereas the transmission scheme between thee relay node and destination node adopt the differential space time coding signaling. We analyze the performance of the system depending on the modulation scheme, i.e., coherent and differential modulation, at the source-relay links. The performance depending on the relay location is also compared by considering modulation scheme and the number of relay node.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.11
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• pp.5381-5399
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• 2016

Currently, the quantize-and-forward (QF) scheme with high order modulation and quantization has rather high complexity and it is thus impractical, especially in multiple relay cooperative communications. To overcome these deficiencies, an improved low complex QF scheme is proposed by the combination of the low order binary phase shift keying (BPSK) modulation and the 1-bit and 2-bit quantization, respectively. In this scheme, the relay selection is optimized by the best relay position for best bit-error-rate (BER) performance, where the relays are located closely to the destination node. In addition, an optimal power allocation is also suggested on a total power constraint. Finally, the BER and the achievable rate of the low order 1-bit, 2-bit and 3-bit QF schemes are simulated and analyzed. Simulation results indicate that the 3-bit QF scheme has about 1.8~5 dB, 4.5~7.5 dB and 1~2.5 dB performance gains than those of the decode-and-forward (DF), the 1-bit and 2-bit QF schemes, at BER of $10^{-2}$, respectively. For the 2-bit QF, the scheme of the normalized Source-Relay (S-R) distance with 0.9 has about 5dB, 7.5dB, 9dB and 15dB gains than those of the distance with 0.7, 0.5, 0.3 and 0.1, respectively, at BER of $10^{-3}$. In addition, the proposed optimal power allocation saves about 2.5dB much more relay power on an average than that of the fixed power allocation. Therefore, the proposed QF scheme can obtain excellent features, such as good BER performance, low complexity and high power efficiency, which make it much pragmatic in the future cooperative communications.

• Journal of Communications and Networks
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• v.18 no.3
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• pp.387-396
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• 2016

Multiuser communication has been an important research area of underwater acoustic communications and networking. This paper studies the use of adaptive orthogonal frequency-division multiple access (OFDMA) in a downlink scenario, where a central node sends data to multiple distributed nodes simultaneously. In practical implementations, the instantaneous channel state information (CSI) cannot be perfectly known by the central node in time-varying underwater acoustic (UWA) channels, due to the long propagation delays resulting from the low sound speed. In this paper, we explore the CSI feedback for resource allocation. An adaptive power-bit loading algorithm is presented, which assigns subcarriers to different users and allocates power and bits to each subcarrier, aiming to minimize the bit error rate (BER) under power and throughput constraints. Simulation results show considerable performance gains due to adaptive subcarrier allocation and further improvement through power and bit loading, as compared to the non-adaptive interleave subcarrier allocation scheme. In a lake experiment, channel feedback reduction is implemented through subcarrier clustering and uniform quantization. Although the performance gains are not as large as expected, experiment results confirm that adaptive subcarrier allocation schemes based on delayed channel feedback or long term statistics outperform the interleave subcarrier allocation scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.12A
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• pp.941-949
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• 2011

In a cooperative communication system with a source node and multiple relays equipping single antenna and a destination node equipping multiple antennas, the selective cooperative spatial multiplexing scheme can obtain spatial multiplexing gain and additional selection diversity gain. But it can degrade a bit error rate performance because some received symbols forwarded from particular relays may be lost by attenuation due to path-loss. We propose a relay and transmission mode selection scheme which selects minimum number of multiple relays having the channel capacity larger than a given data rate and transmission mode which switches spatial multiplexing and spatial diversity mode in cooperation phase to enhance the bit error rate performance. The proposed scheme achieves 1.5~2dB gain at the low SNR range compared with the conventional scheme by obtaining additional spatial diversity gain.