• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.141-144
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• 1998

The electrical characteristics of poly-Si TFT's with offset structure by negative bias stress are systematically investigated as a function of offset length. The changes of electrical characteristics, V$\_$th/, off-current, on/off ratio, in the offset structured poly-Si TFT's are smaller than that of the conventional structured poly-Si TFT's under the stress condition (V$\_$ds/=20V, V$\_$gs/=-20V). It is found that the hot carrier effect by negative bias stress is suppressed by the offset structured poly-Si TFT's because the local electric field near the drain region is decreased by offset region.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.368-368
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• 2010

Using TFTs crystallized by MICC and ELA, electron mobility and threshold voltage were measured according to various substrate temperature from $-40^{\circ}C$ to $100^{\circ}C$. Basic curve, $V_G-I_D$, is also measured under various stress time from 1s to 10000s. Consequently, due to the passivation effect and number of grains, mobility of MICC is varied in the range of -8% ~ 7.6%, while that of ELA is varied from -11.04% ~ 13.25%. Also, since $V_G-I_D$ curve is dominantly affected by grain size, active layer interface, the graph remained steady under the various gate bias stress time from 1s to 10000s. This proves the point that MICC can be alternative technic to ELA.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.302.1-302.1
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• 2016

Solution-processed amorphous metal-oxide thin-film transistors (TFTs) are considered as promising candidates for the upcoming transparent and flexible electronics due to their transparent property, good performance uniformity and possibility to fabricate at a low-temperature. In addition, solution processing metal oxide TFTs may allow non-vacuum fabrication of flexible electronic which can be more utilizable for easy and low-cost fabrication. Recently, for high-mobility oxide TFTs, multi-layered oxide channel devices have been introduced such as superlattice channel structure and heterojunction structure. However, only a few studies have been mentioned on the bias illumination stress in the multi- layered oxide TFTs. Therefore, in this research, we investigated the effects of bias illumination stress in solution-processed bilayer oxide TFTs which are fabricated by the deep ultraviolet photochemical activation process. For studying the electrical and stability characteristics, we implemented positive bias stress (PBS) and negative bias illumination stress (NBIS). Also, we studied the electrical properties such as field-effect mobility, threshold voltage ($V_T$) and subthreshold slop (SS) to understand effects of the bilayer channel structure.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.204.1-204.1
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• 2015

We studied the electrical properties and gate bias stress (GBS) stability of thin film transistors (TFTs) with multi-stacked InZnO layers. The InZnO TFTs were fabricated via solution process and the In:Zn molar ratio was 1:1. As the number of InZnO layers was increased, the mobility and the subthreshold swing (S.S) were improved, and the threshold voltage of TFT was reduced. The TFT with three-layered InZnO showed high mobility of $21.2cm^2/Vs$ and S.S of 0.54 V/decade compared the single-layered InZnO TFT with $4.6cm^2/Vs$ and 0.71 V/decade. The three-layered InZnO TFTs were relatively unstable under negative bias stress (NBS), but showed good stability under positive bias stress (PBS).

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1502-1504
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• 1996

The effects of electrical stress in hydrogen passivated and as-fabricated poly-Si TFT's are investigated. It is observed that the charge trapping in the gate dielectric is the dominant degradation mechanism in poly-Si TFT's which has been stressed by the gate bias alone while the creation of defects in the poly-Si film is prevalent in gate and drain bias stressed devices. The degradation due to the gate bias stress is dramatically reduced with hydrogenation time while the degradation due to the gate and drain bias stress is increased a little. From the experimental results, it is considered that hydrogenation suppress the charge trapping at gate dielectrics as well as improve the characteristics of poly-Si TFT's.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2014.11a
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• pp.108-109
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• 2014

본 논문에서는 gate와 drain bias stress하에서의 a-IGZO thin-film transistors (TFTs)의 비대칭 열화 메커니즘 분석을 진행하였다. Gate와 drain bias stress하에서의 a-IGZO TFT의 열화 현상은 conduction band edge 근처에 존재하는 oxygen vacancy-related donor-like trap의 발생으로 예상되며, TFT의 channel layer 내에서의 비대칭 열화현상은 source의 metal과 a-IGZO layer간의 contact에 전압이 인가되었을 경우, reverse-biased Schottky diode에 의한 source 쪽에서의 높은 electric field가 trap generation을 가속화시킴으로써 일어나는 것임을 확인할 수 있었다.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1582-1585
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• 2009

The effects of bias stress on spin-coated zinc tin oxide (ZTO) transistors are investigated. Applying a positive bias stress results in the displacement of the transfer curves in the positive direction without changing the field effect mobility or the subthreshold behavior. Device instability appears to be a consequence of the charging and discharging of temporal trap states at the interface and in the zinc tin oxide channel region.

• Journal of Biomedical Engineering Research
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• v.30 no.4
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• pp.288-293
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• 2009

This study investigates the relationship of affective style based on EEG asymmetry, personality, and psychological stress on stress. The experiment consists of three sessions: rest state, landscape scene, and horror film tasks. We used a short horror film to evoke stress. We classified affective style of the individual based on EEG alpha asymmetry: negative bias, positive bias and general. The participants in the negative bias group reported higher levels of stress on the neuroticism of the Big 5 model and Cohen's Perceived Stress Scale. These results demonstrate that participants with the propensity for negative affective style have a nervous temperament and are apt to be stressed.

• Korean Journal of Occupational Health Nursing
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• v.25 no.3
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• pp.199-207
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• 2016

Purpose: The purpose of this study was to identify the obesity stress, weight bias and health care on Body Mass Index (BMI) in soldiers of non-combat area and to provide data for improving the quality of their life. Methods: This research involved 165 soldiers working in non-combat area. Data collection was conducted from November 1 to 20, 2015. Statistical analysis of the collected data were t-test and ANOVA, $Scheff{\acute{e}}$ method post hoc analysis, Pearson's correlation coefficients, and multiple liner regression using IBM SPSS 22.0. Results: The mean score of obesity stress was moderate ($19.05{\pm}5.28$). The mean score of weight bias was 69.03 and health care was 2.41 points. There are a positive correlation between obesity stress and BMI (r=.19, p<.05). Weight bias (r=-.19, p<.01) and health care (r=-.26, p<.01) among the subjects had negative correlations with BMI. In a multiple liner regression, obesity stress (${\beta}=.18$, p<.05), health care (${\beta}=-.18$, p<.05) were associated with BMI. Conclusion: Based on the findings that obesity stress and health care influence BMI, there is a need to control stress and to properly set proper guidelines on health care for soldiers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.324-327
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• 2000

In this paper, the effects of negative and positive bias stress on p-channel poly-Si TFT's fabricated by excimer laser annealing have been investigated After positive and negative bias stress, transcon-ductance(g$_{m}$) is increased because of a reduction of the effective channel length due to the injected electron in the gate oxide. In the positive bias stress, the injection of hole is appeared after stress time of 3600sec and g$_{m}$ is decreased. On the other hand, the gate voltage at the maximum g$_{m}$, S-swing and threshold voltage(V$_{th}$) are decreased because of the interface state generation due to the injection of electrons into the gate oxide.e.ide.e.