• Title/Summary/Keyword: Bias stability

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Environment Effects on the Stability of the CQUEAN CCD

  • Choi, Nahyun;Pak, Soojong;Choi, Changsu;Park, Won-Kee;Im, Myungshin;Jeon, Yiseul;Baek, Giseon
    • The Bulletin of The Korean Astronomical Society
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    • v.37 no.2
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    • pp.222.2-222.2
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    • 2012
  • Camera for QUasars in EArly uNiverse (CQUEAN) is an optical CCD camera attached to the 2.1m Otto Struve telescope at the McDonald Observatory, USA. CCD output signal contains the electrons generated by photoionization of incident light and thermal ionization. Therefore reliable photometric result can be obtained only under the stable condition of CCD thermal properties. We investigated the temperature dependency of the various characteristics of CQUEAN CCD chip, including bias level, dark level, gain, and quantum efficiency (QE), with the CQUEAN observation and calibration data obtained during 2012 May run. We discuss the environmental effects, i.e., ambient temperature, as well as CCD temperature on the stability of its characteristics.

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Highly stable amorphous indium.gallium.zinc-oxide thin-film transistor using an etch-stopper and a via-hole structure

  • Mativenga, M.;Choi, J.W.;Hur, J.H.;Kim, H.J.;Jang, Jin
    • Journal of Information Display
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    • v.12 no.1
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    • pp.47-50
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    • 2011
  • Highly stable amorphous indium.gallium.zinc-oxide (a-IGZO) thin-film transistors (TFTs) were fabricated with an etchstopper and via-hole structure. The TFTs exhibited 40 $cm^2$/V s field-effect mobility and a 0.21 V/dec gate voltage swing. Gate-bias stress induced a negligible threshold voltage shift (${\Delta}V_{th}$) at room temperature. The excellent stability is attribute to the via-hole and etch-stopper structure, in which, the source/drain metal contacts the active a-IGZO layer through two via holes (one on each side), resulting in minimized damage to the a-IGZO layer during the plasma etching of the source/drain metal. The comparison of the effects of the DC and AC stress on the performance of the TFTs at $60^{\circ}C$ showed that there was a smaller ${\Delta}V_{th}$ in the AC stress compared with the DC stress for the same effective stress time, indicating that the trappin of the carriers at the active layer-gate insulator interface was the dominant degradation mechanism.

Design of a loosely-coupled GPS/INS integration system (약결합 방식의 GPS/INS 통합시스템 설계)

  • 김종혁;문승욱;김세환;황동환;이상정;오문수;나성웅
    • Journal of the Korea Institute of Military Science and Technology
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    • v.2 no.2
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    • pp.186-196
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    • 1999
  • The CPS provides data with long-term stability independent of passed time and the INS provides high-rate data with short-term stability. By integrating these complementary systems, a highly accurate navigation system can be achieved. In this paper, a loosely-coupled GPS/INS integration system is designed. It is a simple structure and is easy to implement and preserves independent navigation capability of GPS and INS. The integration system consists of a NCU, an IMU, a GPS receiver, and a monitoring system. The navigation algorithm in the NCU is designed under the multi-tasking environment based on a real-time kernel system and the monitoring system is designed using the Visual C++. The integrated Kalman filter is designed as a feedback formed 15-state filter, in which the states are position errors, velocity errors, attitude errors and sensor bias errors. The van test result shows that the integrated system provides more accurate navigation solution then the inertial or the GPS-alone navigation system.

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DC magnetron sputtering을 이용하여 증착한 ZnO 기반의 박막 트랜지스터의 특성 및 stability 향상을 위한 후열처리

  • Kim, Gyeong-Taek;Mun, Yeon-Geon;Kim, Ung-Seon;Park, Jong-Wan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.188-188
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    • 2010
  • 최근까지는 주로 비정질 실리콘이 디스플레이의 채널층으로 상용화 되어왔다. 비정질 실리콘 기반의 박막 트랜지스터는 제작의 경제성 및 균일성을 가지고 있어서 널리 상용화되고 있다. 하지만 비정질 실리콘의 구조적인 문제인 낮은 전자 이동도(< 1 cm2/Vs)로 인하여 디스플레이의 대면적화에 부적합하며, 광학적으로 불투명한 특성을 갖기 때문에 차세대 디스플레이의 응용에 불리한 점이 있다. 이런 문제점의 대안으로 현재 국내외 여러 연구 그룹에서 산화물 기반의 반도체를 박막 트랜지스터의 채널층으로 사용하려는 연구가 진행중이다. 산화물 기반의 반도체는 밴드갭이 넓어서 광학적으로 투명하고, 상온에서 증착이 가능하며, 비정질 실리콘에 비해 월등히 우수한 이동도를 가짐으로 디스플레이의 대면적화에 유리하다. 특히 Zinc Oxide, Tin Oxide등의 산화물이 연구되고 있으며, indium이나 aluminum등을 첨가하여 전기적인 특성을 향상시키려는 노력을 보이고 있다. 본 연구에서는 Zinc Oxide 기반의 박막 트랜지스터를 DC magnetron sputtering를 이용하여 상온에서 제작한 후 다양한 조건에서의 후열처리를 통하여 소자의 특성의 최적화를 이루는 것을 시도하였다. 그리고 ITO를 전극으로 사용하여 bottom gate 구조의 박막 트랜지스터를 만들고 air 분위기에서 온도별, 시간별 열처리를 진행하였다. 또한 gate insulator의 처리를 통하여 thin film의 interface 개선을 통하여 소자의 성능 향상을 시도 하였다. semiconductor analyzer로 소자의 출력 특성 및 전이 특성을 평가하였다. 그 결과 기존의 a-Si 기반의 박막 트랜지스터보다 우수한 이동도의 특성을 갖는 ZnO 박막 트랜지스터를 얻었다. 그리고 이를 바탕으로 ZnO를 이용하여 대면적 적합한 디스플레이를 제작할 수 있다는 가능성을 보인다. 그리고 Temperature, Bias Temperature stability, 경시변화 등의 다양한 조건에서의 안정성을 평가하여 안정성이 향상을 확보하여 비정질 실리콘을 대체할 유력한 후보중위 하나가 될 것이라고 생각된다.

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Improvement in the negative bias stability on the water vapor permeation barriers on Hf doped $SnO_x$ thin film transistors

  • Han, Dong-Seok;Mun, Dae-Yong;Park, Jae-Hyeong;Gang, Yu-Jin;Yun, Don-Gyu;Sin, So-Ra;Park, Jong-Wan
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2012.05a
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    • pp.110.1-110.1
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    • 2012
  • Recently, advances in ZnO based oxide semiconductor materials have accelerated the development of thin-film transistors (TFTs), which are the building blocks for active matrix flat-panel displays including liquid crystal displays (LCD) and organic light-emitting diodes (OLED). However, the electrical performances of oxide semiconductors are significantly affected by interactions with the ambient atmosphere. Jeong et al. reported that the channel of the IGZO-TFT is very sensitive to water vapor adsorption. Thus, water vapor passivation layers are necessary for long-term current stability in the operation of the oxide-based TFTs. In the present work, $Al_2O_3$ and $TiO_2$ thin films were deposited on poly ether sulfon (PES) and $SnO_x$-based TFTs by electron cyclotron resonance atomic layer deposition (ECR-ALD). And enhancing the WVTR (water vapor transmission rate) characteristics, barrier layer structure was modified to $Al_2O_3/TiO_2$ layered structure. For example, $Al_2O_3$, $TiO_2$ single layer, $Al_2O_3/TiO_2$ double layer and $Al_2O_3/TiO_2/Al_2O_3/TiO_2$ multilayer were studied for enhancement of water vapor barrier properties. After thin film water vapor barrier deposited on PES substrate and $SnO_x$-based TFT, thin film permeation characteristics were three orders of magnitude smaller than that without water vapor barrier layer of PES substrate, stability of $SnO_x$-based TFT devices were significantly improved. Therefore, the results indicate that $Al_2O_3/TiO_2$ water vapor barrier layers are highly proper for use as a passivation layer in $SnO_x$-based TFT devices.

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Fabrication of New Co-Silicided Si Field Emitter Array with Long Term Stability (Co-실리사이드를 이용한 새로운 고내구성 실리콘 전계방출소자의 제작)

  • Chang, Gee-Keun;Kim, Min-Young;Jeong, Jin-Cheol
    • Korean Journal of Materials Research
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    • v.10 no.4
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    • pp.301-304
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    • 2000
  • A new triode type Co-silicided Si FEA(field emitter array) was realized by Co-silicidation of Co coated Si FEA and its field emission properties were investigated. The field emission properties of the fabricated device through the unit pixel with $45{\times}45$ tip array in the area of $250{\mu\textrm{m}}{\times}250{\mu\textrm{m}}$ under high vacuum condition of $10^{-8}Torr$ were as follows : the turn-on voltage was about 35V and the anode current was about $1.2\mu\textrm{A}(0.6㎁/tip)$ at the bias of $V_A=500V\;and\; V_G=55V$. The fabricated device showed the stable electrical characteristics without degradation of field emission current for the long term operation except for the initial transient state. The low turn-on voltage and the high current stability of the Co-silicided Si FEA were due to the thermal and chemical stability and the low work function of silicide layer formed at the surface of Si tip.

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Numerical Analysis on Thermal-Induced Degradation of n-i-p Structure Perovskite Solar Cells Using SCAPS-1D (SCAPS-1D 시뮬레이션을 이용한 n-i-p 구조 페로브스카이트 태양전지의 열적 열화 원인 분석)

  • Kim, Seongtak;Bae, Soohyun;Jeong, Younghun;Han, Dong-Woon;Kim, Donghwan;Mo, Chan Bin
    • Current Photovoltaic Research
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    • v.10 no.1
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    • pp.16-22
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    • 2022
  • The long-term stability of PSCs against visual and UV light, moisture, electrical bias and high temperature is an important issue for commercialization. In particular, since the operation temperature of solar cell can rise above 85℃, a study on thermal stability is required. In this study, the cause of thermal-induced degradation of PSCs was investigated using the SCAPS-1D simulation tool. First, PSCs of TiO2/CH3NH3PbI3/Spiro-OMeTAD/Au structure were exposed to a constant temperature of 85℃ to observe changes in conversion efficiency and quantum efficiency. Because the EQE reduction above 500 nm was remarkable, we simulated PSCs performance as a function of lifetime, doping density of perovskite and spiro-OMeTAD. Consequently, the main cause of thermal-induced degradation is considered to be the change in the perovskite doping concentration and lifetime due to ion migration of perovskite.

Fabrication of triode type Ti-silicided field emission tip array (3극 티타늄 실리사이드 전계방출 팁 어레이의 제작)

  • Ohm, Woo-Yong
    • 전자공학회논문지 IE
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    • v.44 no.3
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    • pp.1-5
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    • 2007
  • A new field emission tip array was realized by Ti silicidation of Ti coated Si tip, which has long term durability, chemical stability, and high emission current density. The fabricated Ti silicided FE tip array under high vacuum condition of about $10^{-8}Torr$ shows that the turn-on voltage is about 40V and the emission current is about $69{\mu}A$ when the bias of 150V is applied between anode and cathode of $100{\mu}m$ distance.

A Study on the Effect of Plasma Deuterium Treatment on Reliability of Poly-Silicon Thin Film Transistors (중수소 프라즈마 처리가 다결정 실리콘 TFT의 안정성에 미치는 영향에 관한 연구)

  • Sohn Song Ho;Bae S. C.;Kim Donghwan
    • Korean Journal of Materials Research
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    • v.14 no.7
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    • pp.516-521
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    • 2004
  • We applied a deuterium plasma treatment to the surface of polycrystalline silicon films using PECVD and observed the change with AFM, XRD, ET-IR, and SIMS measurement. A bias temperature stressing (BTS) test was carried out to evaluate the reliability of the thin-film transistors (TFT). TFTs with channel lengths as small as 2 ${\mu}m$ were electrically stressed fer up to 1000 sec at room temperature. From the parameter variation such as s-factor, leakage current and on/off ratio, we suggest that the deuterium plasma treatment suppress the hot carrier effect and improve the stability of TFTs.

Optimization of Powder Core Inductors of Buck-Boost Converters for Hybrid Electric Vehicles

  • You, Bong-Gi;Kim, Jong-Soo;Lee, Byoung-Kuk;Choi, Gwang-Bo;Yoo, Dong-Wook
    • Journal of Electrical Engineering and Technology
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    • v.6 no.4
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    • pp.527-534
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    • 2011
  • In the present paper, the characteristics of Mega-Flux$^{(R)}$, JNEX-Core$^{(R)}$, amorphous and ferrite cores are compared to the inductor of buck-boost converters for Hybrid Electric Vehicles. Core losses are analyzed at the condition of 10 kHz sine wave excitations, and permeability fluctuations vs. temperature and magnetizing force will be analyzed and discussed. Under the specifications of the buck-boost converter for 20 kW THS-II, the power inductor will be designed with Mega-Flux$^{(R)}$ and JNEX-Core$^{(R)}$, and informative simulation results will be provided with respect to dc bias characteristics, core and copper losses.