• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.11 no.3
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• pp.115-120
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• 2011

This paper is concerned with the performance comparison of CR-CMA (Coordinate Reduction-CMA) and CM-CMA (Constellation Matching-Constant Modulus Algorithm) that is used for improving the convergence characteristic and residual intersymbol interference which are used as the performance index for an adaptive equalizer. The equalizer is used to reduce the distortion caused by the intersymbol interference on the wireless and the wired band-limited channel, and the blind method which does not need for extra bandwidth by the training sequence of digital code are researched. Recently, by using the merit of simple operation in the CMA, the performance improvement is obtained by the modifying the cost function of it. In this paper, the new algorithm, CR-CMA and CM-CMA, the performance analysis are performed and compared by computer simulation. The CR-CMA has a superior equalization characteristics in the recovered constellation, convergence speed and residual intersymbol interference than the CM-CMA by computer simulation.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.1
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• pp.193-198
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• 2020

The various uses of the Convolutional Neural Network technology are accelerating the evolution of the computing area, but the opposite is causing serious hardware performance shortages. Neural network accelerators, next-generation memory device technologies, and high-bandwidth memory architectures were proposed as countermeasures, but they are difficult to actively introduce due to the problems of versatility, technological maturity, and high cost, respectively. This study proposes DRAM-based main memory technology that enables read operations to be completed without waiting until the end of the refresh operation using pre-stored XOR bit values, even when the refresh operation is performed in the main memory. The results showed that the proposed technique improved performance by 5.8%, saved energy by 1.2%, and improved EDP by 10.6%.

• Smart Structures and Systems
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• v.20 no.4
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• pp.483-498
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• 2017

Real-Time Hybrid Simulation (RTHS) is a powerful and cost-effective dynamic experimental technique. To implement a stable and accurate RTHS, time delay present in the experiment loop needs to be compensated. This delay is mostly introduced by servo-hydraulic actuator dynamics and can be reduced by applying appropriate compensators. Existing compensators have demonstrated effective performance in achieving good tracking performance. Most of them have been focused on their application in cases where the structure under investigation is subjected to inputs with relatively low frequency bandwidth such as earthquake excitations. To advance RTHS as an attractive technique for other engineering applications with broader excitation frequency, a discrete-time feedforward compensator is developed herein via various optimization techniques to enhance the performance of RTHS. The proposed compensator is unique as a discrete-time, model-based feedforward compensator. The feedforward control is chosen because it can substantially improve the reference tracking performance and speed when the plant dynamics is well-understood and modeled. The discrete-time formulation enables the use of inherently stable digital filters for compensator development, and avoids the error induced by continuous-time to discrete-time conversion during the compensator implementation in digital computer. This paper discusses the technical challenges in designing a discrete-time compensator, and proposes several optimal solutions to resolve these challenges. The effectiveness of compensators obtained via these optimal solutions is demonstrated through both numerical and experimental studies. Then, the proposed compensators have been successfully applied to RTHS tests. By comparing these results to results obtained using several existing feedforward compensators, the proposed compensator demonstrates superior performance in both time delay and Root-Mean-Square (RMS) error.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.4
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• pp.25-31
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• 2017

This paper presents a 270/540/750/1500-Mb/s serial-data transmitter realized in a $0.13-{\mu}m$ CMOS technology for the applications of video data transmission. A low-cost RG-58 copper cable(5C-HFBT-RG6T) is exploited as a transmission medium connected to a single BNC connector, which shows cable loss 45 dB in maximum at 1.5 GHz. RLGC modeling provides an equivalent circuit for SPICE simulations of which characteristics are very similar to the measured cable loss. The loss can be compensated by pre-emphasis at transmitter and equalization at receiver if needed. Measurements of the proposed transmitter chip demonstrate the operations of 270-Mb/s, 540-Mb/s, 750-Mb/s and 1.5-Gb/s, and provide the output voltage levels of $370mV_{pp}$ at 1.5 Gb/s even with the pre-emphasis turned-off. The total power consumption is 104 mW from 1.2/3.3-V supplies and the chip occupies the area of $1.65{\times}0.9mm^2$.

• Aerospace Engineering and Technology
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• v.6 no.1
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• pp.83-91
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• 2007

An experimental verification of multipactor(MP) discharge for S-band diplexer as a sample DUT for space application by an in-house MP test facility is proposed. The designed diplexer having two BPFs for Rx and Tx is applied to a design of five pole inter-digital cavity type band pass filter with chebyshev response, it has 2.7 % bandwidth centered at 2.232 and 2.055 GHz for Rx, Tx, respectively. To avoid the MP discharge, the accurate design and analysis methods based on 3D EM field analysis are considered. The proposed in-house MP test facility consists of a phase detecting system using a doubly balanced mixer as a simple, low cost and real time MP test method compared with results of previously well-known MP detection systems as cross reference methods. The calculated MP threshold RF input power is 43.13 dBm. The measured one is 43 dBm and 44 dBm for CW, pulsed mode test, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.31-38
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• 2011

With the increasing demand for high-speed transmission systems, adaptive equalizers have been widely used in receivers to overcome the limited bandwidth of channels. In order to reduce the cost for testing high-speed receiver chips, on-chip eye-opening monitoring (EOM) technique which measures the eye-opening of data waveform inside the chip can be employed. In this paper, a 10-Gb/s adaptive 2-tap look-ahead decision feedback equalizer (DFE) with EOM function is proposed. The proposed EOM circuit can be applied to look-ahead DFEs while existing EOM techniques cannot. The magnitudes of the post-cursors are measured by monitoring the eye of received signal, and coefficients of DFE are calculated using them by proposed adaptation algorithm. The circuit designed in 90nm CMOS technology and the algorithm are verified with post-layout simulation. The DFE core occupies $110{\times}95{\mu}m^2$ and consumes 11mW in 1.2V supply voltage.

• The KIPS Transactions:PartA
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• v.11A no.7 s.91
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• pp.489-498
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• 2004

VLIW processor is considered to be an appropriate processor for the embedded system, provided with high performance and low power con-sumption due to its simple hardware structure. Unfortunately, the VLIW processor often suffers from high memory access latency due to the variable length of I-packets, which consist of independent instructions to be issued in parallel. It is because of the variable I-packet length that some I-packets must be placed over two cache blocks, which are called straddle I-packets, so that two cache accesses are required to fetch such I-packets. In this paper, an expansion buffer cache is proposed to improve not only the instruction fetch bandwidth, but also the power consumption of the I-cache with moderate hardware cost. The expansion buffer cache has a small expansion buffer containing a fraction of a straddle packet along with the main cache to reduce the additional cache accesses due to the straddle I-packets. With a great reduction in the cache accesses due to the straddle packets, the expansion buffer cache can achieve $5{\~}9{\%}$improvement over the conventional I-caches in the $Delay{\cdot}Power{\cdot}Area$ metric.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.2
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• pp.228-238
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• 2003

We believe that existing wire solutions such as HomePNA2.0 using phone lines and HomePlug using power line and wireless solution such as HomeRF are the most promising solutions, because of its cost-effectiveness. However, MAC protocols of these solutions provide only Class of Service(CoS) using priority mechanism like HomePNA and HomePlug or consider only voice among real-time traffics like HomeRF. For these reasons, we perceive the needs of the new MAC protocol which is no new wire solution and provides guaranteed Quality of Service (QoS) for not only voice but also video and audio. In light of this, we present the design and software implementation of a new MAC protocol for Home Networks. Our evaluation results of software implementation verify that proposed MAC protocol can provide low delay, low loss, and low jitter to real-time traffic by reserving bandwidth.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.9
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• pp.1955-1964
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• 2011

With fast deployment of high-speed networks and various online services, the demand for massive content distribution is also growing fast. An approach that is increasingly visible in communication research community and in industry domain is peer-to-peer (P2P) networks. The P2P swarming technique enables a content distribution system to achieve higher throughput, avoid server or network overload, and be more resilient to failure and traffic fluctuation. Moreover, as a P2P-based architecture pushed the computing and bandwidth cost toward the network edge, it allows scalability to support a large number of subscribers on a global scale, while imposing little demand for equipment on the content providers. However, the P2P swarming burdens message exchange overheads on the system. In this paper, we propose a new protocol which provides confidentiality, authentication, integrity, and access control to P2P swarming. We implemented a prototype of our protocol on Android smart phone platform. We believe our approach can be straightforwardly adapted to existing commercial P2P content distribution systems with modest modifications to current implementations.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.2
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• pp.49-56
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• 2007

MEMS-based storage is being developed as a new storage media. Due to its attractive features such as high-bandwidth, low-power consumption, high-density, and low cost, MEMS storage is anticipated to be used for a wide range of applications from storage for small handhold devices to high capacity mass storage servers. However, MEMS storage has vastly different physical characteristics compared to a traditional disk. First, MEMS storage has thousands of heads that can be activated simultaneously. Second, the media of MEMS storage is a square structure which is different from the platter structure of disks. This paper presents a new request scheduling algorithm for MEMS storage that makes use of the aforementioned characteristics. This new algorithm considers the parallelism of MEMS storage as well as the seek time of requests on the two dimensional square structure. We then extend this algorithm to consider the aging factor so that starvation resistance is improved. Simulation studies show that the proposed algorithms improve the performance of MEMS storage by up to 39.2% in terms of the average response time and 62.4% in terms of starvation resistance compared to the widely acknowledged SPTF (Shortest Positioning Time First) algorithm.