• IE interfaces
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• v.7 no.3
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• pp.171-180
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• 1994

Defined is a Multi-level Parallel Machine Flow-Shop (MPMFS) which reflects some real world manufacturing situations. Just-In-Time (JIT) philosophy is applied to the MPMFS scheduling in order to achieve lowering work-in-process inventory level as well as meeting due dates. A schedule generating simulator is developed. The latest start time of each operation is determined by a backward simulation followed by another forward simulation to analyze the schedule feasibility and actual inventory level. Reasonable schedules are available through adjusting some parameters for allowance factors such as set-up times of machines and other environmental changes. The SLAMSYSTEM under Window is employed for this processing with some input/output data handling processes devised under DOS.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.8 no.11
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• pp.45-56
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• 1985

This thesis studies the order release scheduling by lead time offsetting technique in MRP system. MRP is the process of working backward from the scheduled completion dates of end products or major assemblies to determine the dates and quantities when the various component parts and materials are to be ordered. It aims getting the right quantity of component parts to the right places at the right time with a schedule that puts each parts or subassembly into stock shortly ahead of the need for that parts or subassembly. The planned order release point of a item can be easily decided when the scheduled completion date and planned lead time is certain and known before by lead time offsetting technique in MRP system.

• Industrial Engineering and Management Systems
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• v.8 no.3
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• pp.171-180
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• 2009

Population learning algorithm (PLA) is a population-based method that was inspired by the similarities to the phenomenon of social education process in which a diminishing number of individuals enter an increasing number of learning stages. The study aims to develop a framework that repeatedly applying the PLA to solve the discrete resource constrained project scheduling problem with two objectives: minimizing project makespan and renewable resource availability, which are two most common concerns of management when a project is being executed. The PLA looping framework will provide a number of near Pareto optimal schedules for the management to make a choice. Different improvement schemes and learning procedures are applied at different stages of the process. The process gradually becomes more and more sophisticated and time consuming as there are less and less individuals to be taught. An experiment with ProGen generated instances was conducted, and the results demonstrated that the looping framework using PLA outperforms those using genetic local search, particle swarm optimization with local search, scatter search, as well as biased sampling multi-pass algorithm, in terms of several performance measures of proximity. However, the diversity using spread metric does not reveal any significant difference between these five looping algorithms.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2004.05a
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• pp.96-100
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• 2004

In the ship building industry various problems of erection is counterfeited due to formation of bottle necks in the block erection flow pattern This kind of problems cause accumulated problems in real-time erection right on the floor, When such a problem is approached, a support data of the entire erection sequence should be available, Here planning is done by reasoning about the future events in order to verify the existence of a reasonable series of actions to accomplish a goal. This technique helps in achieving benefits like handling search complications, in resolving goal conflicts and anticipation of bottleneck formation well in advance to take necessary countermeasures and boosts the decision support system, The data is being evaluated and an anticipatory function is to be developed This function is quite relevant in day to day planning operation. The system updates database with rearrangement of off-critical blocks in the erection sequence diagram, As a result of such a system, planners can foresee months ahead and can effectively make decisions regarding the control of loads on the man, machine and work flow pattern, culminating to an efficient load management. Such a foreseeing concept helps us in eliminating backtracking related adjustment which is less efficient compared to the look-ahead concept. An attempt is made to develop a computer program to update the database of block arrangement pattern based on heuristic formulation.

• Industrial Engineering and Management Systems
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• v.4 no.1
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• pp.23-35
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• 2005

This paper aims to develop a practical finite capacity MRP (FCMRP) system based on the needs of an automotive parts manufacturing company in Thailand. The approach includes a linear goal programming model to determine the optimal start time of each operation to minimize the sum of penalty points incurred by exceeding the goals of total earliness, total tardiness, and average flow-time considering the finite capacity of all work centers and precedence of operations. Important factors of the proposed FCMRP system are penalty weights and dispatching rules. Effects of these factors on the performance measures are statistically analyzed based on a real situation of an auto-part factory. Statistical results show that the dispatching rules and penalty weights have significant effects on the performance measures. The proposed FCMRP system offers a good tradeoff between conflicting performance measures and results in the best weighted average performance measures when compared to conventional forward and forward-backward finite capacity scheduling systems.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.4
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• pp.1655-1673
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• 2018

Mobile computing environment is subject to the constraints of bounded network bandwidth, frequently encountered disconnections, insufficient battery power, and system asymmetry. To meet these constraints and to gain high scalability, data broadcasting has been proposed on data transmission techniques. However, updates made to the database in any broadcast cycle are deferred to the next cycle in order to appear to mobile clients with lower data currency. The main goal of this paper is to enhance the transaction performance processing and database currency. The main approach involves decomposing the main broadcast cycle into a number of sub-cycles, where data items are broadcasted as they were originally sequenced in the main cycle while appearing in the most current versions. A concurrency control method AOCCRBSC is proposed to cope well with the cycle decomposition. The proposed method exploits predeclaration and adapts the AOCCRB method by customizing prefetching, back-off, and partial backward and forward validation techniques. As a result, more than one of the conflicting transactions is allowed to commit at the server in the same broadcast cycle which empowers the processing of both update and read-only transactions and improves data currency.

• Journal of the Korea Institute of Building Construction
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• v.18 no.6
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• pp.595-602
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• 2018

Network-based scheduling methods can be classified into CPM method and PERT method. In the network scheduling chart, critical path can be estimated by performing the forward calculation and the backward calculation though the paths in the network chart. In PERT method, however, it is unreasonable to simply estimate the critical path by adding the sum of the activity durations in a specific path, since it does not incorporate probabilistic concept of PERT. The critical path of a PERT network can change according to the target period and deviation, and in some cases, the expected time of the critical path may not be the path with longest expected time. Based on this concept, this study proposes a technique to derive the most-likely critical path by comparing the sum of estimated time with the target time. It also proposes a method of systematically deriving all alternate paths for a network of repetitive activities. Case studies demonstrated that the most-likely critical path is not a fixed path and may vary according to the target period and standard deviation. It is expected that the proposed method of project duration forecasting will be useful in construction environment with varying target date situations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.9B
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• pp.1643-1651
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• 1999

Video-On-Demand (VOD) is expected to provide the user with interactive operations such as VCR functions. In particular, fast scan functions like “Fast Forward” of “Fast Backward” for a certain speedup playback are required. Since they require a significant amount of system resources, schemes to reduce bandwidth requirements for the network or disk are needed. In MPEG standard, Group-of-Pictures (GoP) is a random access unit which can be decoded independently. Since storing and transmitting a video stream based on GoP is efficient, it is practical to support fast scan functions based on GoP. In this paper, we present a dynamic transmission scheduling scheme to support fast scan functions with m-times normal playback rate for a stored video. The proposed scheme writes a transmission schedule whenever user requests a fast scan function. That is, the scheme constructs the data set to be smoothed by skipping GoPs according to a given speedup factor, and then writes the transmission schedule by applying a bandwidth smoothing. Finally, the scheme restarts the transmission of video data to a client according to the new schedule. The proposed scheme results in speeding up the playback rate by utilizing “GoP skipping”, and then reduces the computational overhead by applying a bandwidth smoothing based on GoP.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.431-435
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• 2011

This paper presents optimized searching technique to improve the performance of H.264/AVC. The proposed CAVLC encoder uses forward and backward searching algorithm to compute the parameters. By zero-block skipping technique and pipelined scheduling, the proposed CAVLC encoder can obtain better performance. The experimental result shows that the proposed architecture needs only 66.6 cycles on average for each $16{\times}16$ macroblock encoding. The proposed architecture improves the performance by 13.8% than that of previous designs. The proposed CAVLC encoder was implemented using VerilogHDL and synthesized with Megnachip $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count is about 15.6K with 125Mhz clock frequency.