• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.152-159
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• 2016

This paper describes an offset and 1/f noise cancellation technique based hall sensor signal processor. The hall sensor outputs a hall voltage from the input magnetic field, which direction is orthogonal to hall plate. The two major elements to complete the hall sensor operation are: the one is a hall sensor to generate hall voltage from input magentic field, and the other one is a hall signal process system to cancel the offset and 1/f noise of hall signal. The proposed hall sensor splits the hall signal and unwanted signals(i.e. offset and 1/f noise) using a spinning current biasing technique and chopper stabilizer. The hall signal converted to 100 kHz and unwanted signals stay around DC frequency pass through chopper stabilizer. The unwanted signals are bloked by highpass filter which, 60 kHz cut off freqyency. Therefore only pure hall signal is enter the ADC(analog to dogital converter) for digitalize. The hall signal and unwanted signal at the output of an amplifer and highpass filter, which increase the power level of hall signal and cancel the unwanted signals are -53.9 dBm @ 100 kHz and -101.3 dBm @ 10 kHz. The ADC output of hall sensor signal process system has -5.0 dBm hall signal at 100 kHz frequency and -55.0 dBm unwanted signals at 10 kHz frequency.

• Journal of IKEEE
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• v.24 no.4
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• pp.1093-1097
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• 2020

This work describes the design and characterization of a Ku-band monolithic microwave integrated circuit (MMIC) power amplifier (PA) for satellite communication applications. The device technology used relies on 0.25 ㎛ gate length gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (PHEMT) of wireless information networking (WIN) semiconductor foundry. The developed Ku-band PHEMT MMIC power amplifier has a small-signal gain of 22.2~23.1 dB and saturated output power of 34.8~35.4 dBm over the entire band of 13.75 to 14.5 GHz. Maximum saturated output power is a 35.4 dBm (3.47 W) at 13.75 GHz. Its power added efficiency (PAE) is 30.6~37.83% and the chip dimensions are 4.4 mm×1.9 mm. The developed 3 W PHEMT MMIC power amplifier is expected to be applied in a variety of Ku-band satellite communication applications.

• Journal of Biomedical Engineering Research
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• v.19 no.1
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• pp.81-90
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• 1998

Electromagnetic waves may induce various effects on nervous tissues either by thermal or non-thermal mechanisms. This paper intoduces a method to evalute the non-thermal effect to central nervous system by measuring the EEGs of the rabbits treated by nimodipine before exposed to weak microwave field. 20 rabbits were divided into 2 groups and their EEGs were measured after their head section were exposed to 2,450 MHz microwave with the power density of 10 dBm and 20 dBm respectively for 10 minutes and compared with those of the 3rd group of 10 rabbits which were not exposed. The 4th group of 10 rabbits were intravenously given with nimodipine before exposed to 20 dBm field to determine whether this drug would reverse the EEGs changes induced by weak microwave irradiation. As field poser exceeded 20 dBm although no significant physiological changes were observed, total induced EEGs power was remarkably decreased suggesting the presence of CNS activation. Using Fourier analysis on the EEGs signal it was found that remarkable decrease in delta band and increase in the alpha and beta bands in a significant manner(P<0.05) compared to control group. The changes were, however, not reversed by nimodipine-treatment. The effects may be pure thermal in nature because no significant change has been observed in nimodipine treated rabbits.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.3
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• pp.421-432
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• 2020

This paper proposes a 2-kW solid-state power amplifier (SSPA) developed by employing power amplifier pallets designed using gallium-nitride high electron mobility transistors, which is used in S-band military radars and to replace existing traveling-wave tube amplifier (TWTA). The SSPA consists of a high-power amplifier module, which combines eight power amplifier pallets, a drive amplifier module, a digital control module, and a power supply unit. First, the amplifier module and component were integrated into a small package to account for space limitations; next, an on-board harmonic filter was fabricated to reject spurious components; and finally, an auto gain control system was designed for various duty ratios because recent military radar systems are all active phase radars using the pulse operation mode. The developed SSPA exhibited a max gain of 48 dB and an output power ranging between 63-63.6 dBm at a frequency band of 3.1 to 3.5 GHz. The auto gain control function showed that the output power is regulated around 63 dBm despite the fluctuation of the input power from 15-20 dBm. Finally, reliability of the developed system was verified through a temperature environment test for nine hours at high (55 ℃) / low (-40℃) temperature profile in accordance with military standard 810. The developed SSPA show better performance such as light weight, high output, high gain, various safety function, low repair cost and short repair time than existing TWTA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.131-136
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• 2008

Two Ka-band 3-stage power amplifiers were designed and fabricated using $0.18-{\mu}m$ CMOS technology. For low loss matching networks for the amplifiers, two substrate-shielded transmission line structures, having good modeling accuracy up to 40 GHz were used. The measured insertion loss of substrate-shielded microstrip-line (MSL) was 0.5 dB/mm at 27 GHz. A 3-stage CMOS amplifier using substrate-shielded MSL achieved a 14.7-dB small-signal gain and a 14.5-dBm output power at 27 GHz in a compact chip area of 0.83$mm^2$. The measured insertion loss of substrate-shielded coplanar waveguide (CPW) was 1.0 dB/mm at 27 GHz. A 3-stage amplifier using substrate-shielded CPW achieved a 12-dB small-signal gai and a 12.5-dBm output power at 26.5 GHz. This results shows a potential of CMOS technology for low cost short-range wireless communication components and system.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.3 s.333
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• pp.1-8
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• 2005

In this paper, design and implement 60W Doherty power amplifiers for 3GPP repeater and base station transceiver system. Efficiency improvement and high power property of Doherty power amplifier is distinguishable; however implementation of assistance amplifer is difficult, though. To solve the problem, therefore, GCHD (Gate Control Hybrid Doherty) power amplifier is embodied to gate bias adjusament circuit of assistance amplifier to General Doherty power amplifier. Experiment result shows that $2.11\~2.17GHz$, 3GPP operating frequency band, with 62.55 dB gain, PEP output is 50,76 dBm, W-CDMA average power is 47.81 dBm, and -40.05 dBc ACLR characteristic in 5MHz offset frequency band. Each of the parameter satisfied amplifier specification which we want to design. Especially, GCHD power amplifier shows proper efficiency performance improvement in uniformity ACLR than general power amplifier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.9
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• pp.897-903
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• 2011

This paper presents a highly linear power amplifier MMIC, having an output power level of about 1 watt, based on InGaP/GaAs hetero-junction bipolar transistor(HBT) technology for the 900 MHz band. The active bias circuit is applied to minimize the effect of temperature variation. Ballast resistors are optimized to prevent a current collapse and a thermal runaway. The fabricated power amplifier exhibited a gain of 17.6 dB, an output P1dB of 30 dBm, and a PAE of 44.9 % at an output P1dB from the one-tone excitation. It also showed a very high OIP3 of 47.3 dBm at an average output power of 20 dBm from the two-tone excitation.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.415-418
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• 2007

This paper presents the design and analysis of LNA-Mixer for 2.45GHz RFID reader. The LNA is implemented by PCSNIM method for low power consumption. The Mixer is implemented by using the Gilbert-type configuration, current bleeding technique, and the resonating technique for the tail capacitance. The connection between the two designed circuits is made by active balun. This LNA-Mixer has about 35dB for -40dBm input RF power, LO power is 0dBm and RF frequency is 2.45 GHz and IIP3 is -4dBm. The layout of LNA-Mixer for one-chip design in a $0.18-{\mu}m$ TSMC process has 2.6mm ${\times}$ 1.3mm size.

• Aerospace Engineering and Technology
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• v.6 no.1
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• pp.83-91
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• 2007

An experimental verification of multipactor(MP) discharge for S-band diplexer as a sample DUT for space application by an in-house MP test facility is proposed. The designed diplexer having two BPFs for Rx and Tx is applied to a design of five pole inter-digital cavity type band pass filter with chebyshev response, it has 2.7 % bandwidth centered at 2.232 and 2.055 GHz for Rx, Tx, respectively. To avoid the MP discharge, the accurate design and analysis methods based on 3D EM field analysis are considered. The proposed in-house MP test facility consists of a phase detecting system using a doubly balanced mixer as a simple, low cost and real time MP test method compared with results of previously well-known MP detection systems as cross reference methods. The calculated MP threshold RF input power is 43.13 dBm. The measured one is 43 dBm and 44 dBm for CW, pulsed mode test, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.23-29
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• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.