• Title/Summary/Keyword: BJT

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Design of a BJT low-voltge low-frequency filter using current amplifier (전류증폭기를 이용한 BJT 저전압 저주파 필터 설계)

  • 안정철;최석우;윤창훈
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.5
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    • pp.33-40
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    • 1998
  • In this paper, a design of current-mode continuous-time filters for low voltage and low frequency applications using complementary bipolar current mirrors is presented. The proposed current-mode filters consist of simple bipolar current mirrors and capacitors and are quite suitable for monolithic integration. Since the design method of the proposed current-mode filters are based on the integrator type of realization, it can be used for a wide range of applications. Since the input impedance of simple bipolar current mirror is small, in this paper, negative feedback amplifier is used to realize is designed by cascade method. The cutoff frequency of the designed filter can be easily tunable by the DC controlling current from 60kHz to 120kHz. The characteristics of the designed current-mode filters are simulated and examined by SPICE using standard bipolar transistor parameters.

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Fabrication and Characterization of Floating-Gate MOSFET with Multi-Gate and Channel Structures for CMOS Image Sensor Applications (다중 Gate 및 Channel 구조를 갖는 CMOS 영상 센서용 Floating-Gate MOSFET 소자의 제작 및 특성 평가)

  • Ju, Byeong-Gwon;Sin, Gyeong-Sik;Lee, Yeong-Seok;Baek, Gyeong-Gap;Lee, Yun-Hui;Park, Jeong-Ho
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.1
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    • pp.17-22
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    • 2001
  • The floating-gate MOSFETs were fabricated by employing 1.5 m n-well CMOS process and their optical-electrical properties were characterized for the application to CMOS image sensor system. Based on the simulation of energy band diagram and operating mechanism of parasitic BJT were proposed as solutions for the increase of photo-current value. In order to realize them, MOSFETs having multi-gate and channel structures were fabricated and 60% increase in photo-current was achieved through enlargement of depletion layer and parallel connection of parasitic BJTs by channel division.

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Improving Efficiency of Single-phase Z-Source inverter by Switching Mixture Method (스위치 혼합방식을 이용한 단상 Z-Source 인버터 효율개선)

  • Kim, Ki-Seon;Tao, Yu;Park, Sung-Jun;Lim, Young-Cheol;Kim, Cheul-U
    • Proceedings of the KIPE Conference
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    • 2007.07a
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    • pp.232-234
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    • 2007
  • 본 논문은 Z-Source 인버터의 효율 증대를 위해 기존의 스위칭 회로에의 lower-arm의 스위칭 소자를 BJT구성하여, 스위칭 회로가 FET와 BJT로 구성된 Z-Source 인버터 구조를 제안하였으며, 제안된 인버터 구조에 적합한 스위칭 신호를 분석 및 스위칭 손실의 효율을 개선하였다. 또한 본 논문을 PSIM 시뮬레이션과 실험을 통해 제안된 방식의 성능을 확인하였다.

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Pyro Squib Circuit Design with Stable Constant Current Driving Method (안정적인 정전류 구동 방식의 파이로 스퀴브 회로 설계)

  • Soh, KyoungJae
    • Journal of the Korea Institute of Military Science and Technology
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    • v.25 no.5
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    • pp.545-551
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    • 2022
  • We proposed a design method for constant current pyro squib circuit. The current method using N MOSFET for the stability problem has a weakness of the current change, requiring a new design. This paper identified the problem with conventional squib circuit where the current is reduced by 25 % when maximum resistance is 3 ohms. Thus, we proposed a stable constant current driving circuit using P MOSFET and PNP BJT. We confirmed stable constant circuit operation through simulations and measurements of the proposed circuit design where the current did not change until the resistance reached 3 ohms.

Memory window characteristics of vertical nanowire MOSFET with asymmetric source/drain for 1T-DRAM application (비대칭 소스/드레인 수직형 나노와이어 MOSFET의 1T-DRAM 응용을 위한 메모리 윈도우 특성)

  • Lee, Jae Hoon;Park, Jong Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.4
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    • pp.793-798
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    • 2016
  • In this work, the memory window characteristics of vertical nanowire device with asymmetric source and drain was analyzed using bipolar junction transistor mode for 1T-DRAM application. A gate-all-around (GAA) MOSFET with higher doping concentration in the drain region than in the source region was used. The shape of GAA MOSFET was a tapered vertical structure that the source area is larger than the drain area. From hysteresis curves using bipolar junction mode, the memory windows were 1.08V in the forward mode and 0.16V in the reverse mode, respectively. We observed that the latch-up point was larger in the forward mode than in the reverse mode by 0.34V. To confirm the measurement results, the device simulation has been performed and the simulation results were consistent in the measurement ones. We knew that the device structure with higher doping concentration in the drain region was desirable for the 1T-DRAM using bipolar junction mode.

A Study on the Modeling of a High-Voltage IGBT for SPICE Simulations (고전압 IGBT SPICE 시뮬레이션을 위한 모델 연구)

  • Choi, Yoon-Chul;Ko, Woong-Joon;Kwon, Kee-Won;Chun, Jung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.12
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    • pp.194-200
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    • 2012
  • In this paper, we proposed a SPICE model of high-voltage insulated gate bipolar transistor(IGBT). The proposed model consists of two sub-devices, a MOSFET and a BJT. Basic I-V characteristics and their temperature dependency were realized by adjusting various parameters of the MOSFET and the BJT. To model nonlinear parasitic capacitances such as a reverse-transfer capacitance, multiple junction diodes, ideal voltage and current amplifiers, a voltage-controlled resistor, and passive devices were added in the model. The accuracy of the proposed model was verified by comparing the simulation results with the experimental results of a 1200V trench gate IGBT.

A LNA for 2.4GHz Bluetooth application

  • 유정근;김정태;허창우
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.05a
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    • pp.386-389
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    • 2003
  • 본 논문에서는 Bluetooth applications를 위한 Bipolar Transistor low noise amplifier (LNA)를 설계하였다. 설계된 LNA는 2.4GHz에서 14.31[dB]의 Gain과 1.59[dB]의 NF를 보였다. 또한 S11은 -13.5[dB], S22는 -21.4[dB]의 양호한 값은 보였다.

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A LNA for CDMA application

  • 유정근;김윤호;김정태;허창우
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.765-768
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    • 2003
  • 본 논문에서는 Noise Figure, IP3, Gain, power dissipation들을 최대한 고려하여 간단하면서도 훌륭한 성능을 보이는 PCS용 1.9 GHz CDMA Low Noise Amplifier를 설계하였다. 비록 본 논문에서는 특정한 트랜지스터를 이용하여 설계하였지만, 다른 트랜지스터를 사용하여 이러한 방법으로 설계하여도 무관할 것이다.

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The Design of BCM based Power Factor Correction Control IC for LED Applications (LED 응용을 위한 BCM 방식의 Power Factor Correction Control IC 설계)

  • Kim, Ji-Man;Jung, Jin-Woo;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.6
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    • pp.2707-2712
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    • 2011
  • In this paper, a power factor correction (PFC) control circuit using single stage boundary conduction mode(BCM) for the 400V. 120W LED drive application has been designed. The proposed control circuit is aimed for improvement of the power factor correction and reduction of the total harmonic distortion. In this circuit, a new CMOS multiplier structure is used instead of a conventional BJT(bipolar junction transistor) based multiplier where has a relatively large area. The CMOS multiplier can bring 30 % reduced chip area, competitive die cost in comparison with the conventional BJT multiplier.

A Study on 1/f Noise Characteristics of the Base Spreading Resistance for BJT (BJT 베이스 분산저항의 1/f 잡음특성에 관한 연구)

  • Koo, Hoe-Woo;Lee, Kie-Young
    • Journal of IKEEE
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    • v.3 no.2 s.5
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    • pp.236-242
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    • 1999
  • J noise component due to base spreading resistance ${\gamma}_{bb}$ of bipolar junction transistors fabricated by BiCMOS process is experimentally analyzed. The analysis of equivalent noise circuit for common collector shows that output 1/f noise value is purely generated from ${\gamma}_{bb}\;when\;g_m^{-1}-{\gamma}_{bb}-R_B$ is closely to zero. From the $S^{1/f}_{Irbb}=K_fI_b{^{A_1}}/f$, we fine that $A_f=2,\;K_f{\simeq}5{\times}10^{-9}$. And Hooge constant ${\alpha}$ values are in the order, of 10$^{-3}$.

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