• Journal of the Korean Data and Information Science Society
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• v.27 no.2
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• pp.381-394
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• 2016

Graphical model represents conditional dependencies between variables as a graph with nodes and edges. It is widely used in various fields including physics, economics, and biology to describe complex association. Conditional dependencies can be estimated from a inverse covariance matrix, where zero off-diagonal elements denote conditional independence of corresponding variables. This paper proposes a efficient BCDR (block coordinate descent with random permutation) algorithm using graphics processing units and random permutation for the CONCORD (convex correlation selection method) based on the BCD (block coordinate descent) algorithm, which estimates a inverse covariance matrix based on pseudo-likelihood. We conduct numerical studies for two network structures to demonstrate the efficiency of the proposed algorithm for the CONCORD in terms of computation times.

• Proceedings of the IEEK Conference
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• summer
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• pp.225-228
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• 2004

This paper presents a hybrid decimal division algorithm to improve division speed. In a binary number system, non-restoring algorithm has a smaller number of operations than restoring algorithm. In decimal number system, however, the number of operations differs with respect to quotient values. Since one digit ranges 0 to 9 in decimal, the proposed hybrid algorithm employ either non-restoring or restoring algorithm on each digit to reduce iterative operations. The selection of the algorithm is based on the remainder values. The proposed algorithm improves computation speed substantially over conventional algorithms by decreasing the number of operations.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.532-533
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• 2008

연계지역 전력시장 간의 에너지 거래는 전체 전력시장의 사회적 편익을 향상시키기 위해 이루어진다. 기존의 연계지역 전력시장 간시장 최적화 문제를 다루는 중앙처리 접근방식은 경쟁적 전력시장 환경하에서 적합한 모델이 아니다. 본 논문은 연계지역 전력시장 문제를 다루기 위해 보완 라그랑지안 승수 기법(Augmented Lagrangian Relaxation) 기반의 분산처리 최적화 방법을 제시한다. Block Coordinate Descent(BCD) 분산처리 기법이 보완 라그랑지안 승수의 최적화 문제를 분리하기 위해 적용된다. 연계시장 모델을 구현한 사례연구를 통해 제시된 알고리즘의 효용성을 입증한다.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.25 no.3
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• pp.107-116
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• 2021

We introduce optimization algorithms using Bregman Divergence for solving non-negative matrix factorization (NMF) problems. Bregman divergence is known a generalization of some divergences such as Frobenius norm and KL divergence and etc. Some algorithms can be applicable to not only NMF with Frobenius norm but also NMF with more general Bregman divergence. Matrix Factorization is a popular non-convex optimization problem, for which alternating minimization schemes are mostly used. We develop the Bregman proximal gradient method applicable for all NMF formulated in any Bregman divergences. In the derivation of NMF algorithm for Bregman divergence, we need to use majorization/minimization(MM) for a proper auxiliary function. We present algorithmic aspects of NMF for Bregman divergence by using MM of auxiliary function.

• Journal of IKEEE
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• v.24 no.1
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• pp.161-169
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• 2020

In order to reduce the manufacturing cost of MCU chips used in applications such as wireless chargers and USB-C, compared to DP-EEPROM (Double Poly EEPROM), which requires 3 to 5 additional process masks, it is even more necessary MTP(Multi-Time Programmable), which is less than one additional mask and have smaller unit cell size. In addition, in order to improve endurance characteristics and data retention characteristics of the MTP memory cell due to E/P(Erase / Program) cycling, the distribution of the V_TP(Program Threshold Voltage) and the V_TE(Erase Threshold Voltage) needs to be narrow. In this paper, we proposed a current-type BL S/A(Bit-Line Sense Amplifier) circuit, WM(Write Mask) circuit, BLD(BL Driver) circuit and a algorithm, which can reduce the distribution of program and V_T and erase V_T, through compare the target current by performing the erase and program pulse of the short pulse several times, and if the current specification is satisfied, the program or erase operation is no longer performed. It was confirmed that the 256Kb MTP memory fabricated in the Magnachip semiconductor 0.13㎛ process operates well on the wafer in accordance with the operation mode.