• Title/Summary/Keyword: Au Bump

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Modeling of Soldering Process using Longitudinal Ultrasonic (종방향 초음파를 이용한 솔더링 공정의 모델링)

  • 김정호;이지혜;유중돈;최두선
    • Journal of Welding and Joining
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    • v.21 no.5
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    • pp.534-539
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    • 2003
  • An efficient soldering process using the longitudinal ultrasonic vibration is introduced in this work for electronic packaging. The effects of the process parameters such as the ultrasonic frequency, amplitude, dimension of the metal bump and solder are analyzed through a viscoelastic lumped model. The viscoelastic properties of the eutectic solder were measured for calculation and evaluation of heat generation capability of the solder. Experiments were conducted to verify the possibility of the proposed ultrasonic soldering method by inserting the Cu and Au bumps into the solder block. Localized heating due to ultrasonic vibration melts the solder near the metal bump, which demonstrates the applicability of the ultrasonic soldering method to the high-density electronic packaging.

A study on the interfacial reactions between electroless Ni-P UBM and 95.5Sn-4.0Ag-0.5Cu solder bump (무전해 Ni-P UBM과 95.5Sn-4.0Ag-0.5Cu 솔더와의 계면반응 및 신뢰성에 대한 연구)

  • ;;Sabine Nieland;Adreas Ostmann;Herbert Reich
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.05a
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    • pp.85-91
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    • 2002
  • Even though electroless Hi and Sn-Ag-Cu solder are widely used materials in electronic packaging applications, interfacial reactions of the ternary Ni-Cu~Sn system have not been known well because of their complexity. Because the growth of intermetallics at the interface affects reliability of solder joint, the intermetallics in Ni-Cu-Sn system should be identified, and their growth should be investigated. Therefore, in present study, interfacial reactions between electroless Ni UB7f and 95.5Sn-4.0Ag-0.5Cu alloy were investigated focusing on morphology of the IMCs, thermodynamics, and growth kinetics. The IMCs that appear during a reflow and an aging are different each other. In early stage of a reflow, ternary IMC whose composition is Ni$_{22}$Cu$_{29}$Sn$_{49}$ forms firstly. Due to the lack of Cu diffusion, Ni$_{34}$Cu$_{6}$Sn$_{60}$ phase begins growing in a further reflow. Finally, the Ni$_{22}$Cu$_{29}$Sn$_{49}$ IMC grows abnormally and spalls into the molten solder. The transition of the IMCs from Ni$_{22}$Cu$_{29}$Sn$_{49}$ to Ni$_{34}$Cu$_{6}$Sn$_{60}$ was observed at a specific temperature. From the measurement of activation energy of each IMC, growth kinetics was discussed. In contrast to the reflow, three kinds of IMCs (Ni$_{22}$Cu$_{29}$Sn$_{49}$, Ni$_{20}$Cu$_{28}$Au$_{5}$, and Ni$_{34}$Cu$_{6}$Sn$_{60}$) were observed in order during an aging. All of the IMCs were well attached on UBM. Au in the quaternary IMC, which originates from immersion Au plating, prevents abnormal growth and separation of the IMC. Growth of each IMC is very dependent to the aging temperature because of its high activation energy. Besides the IMCs at the interface, plate-like Ag3Sn IMC grows as solder bump size inside solder bump. The abnormally grown Ni$_{22}$Cu$_{29}$Sn$_{49}$ and Ag$_3$Sn IMCs can be origins of brittle failure.failure.

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High Integration Packaging Technology for RF Application

  • Lee, Young-Min
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 1999.12a
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    • pp.127-154
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    • 1999
  • Interconnect - Wire bonding-> Flip chip interconnect ; At research step, Au stud bump bonding seems to be more proper .Package -Plastic package-> $Z_{0}$ controlled land grid package -Flip Chip will be used for RF ICs and CSP for digital ICs -RF MCM comprised of bare active devices and integrated passive components -Electrical design skills are much more required in RF packaging .Passive Component -discrete-> integrated -Both of size and numbers of passive components must be reduced

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Thermocompression Anisothropic Conductive Films(ACFs) bonding for Flat Panel Displays(FPDs) Application (평판디스플레이를 위한 열압착법을 이용한 이방성 도전성 필름 접합)

  • Pak, Jin-Suk;Jo, Il-Jea;Shin, Young-Eui
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.3
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    • pp.199-204
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    • 2009
  • The effect of temperature on ACF thermocompression bonding for FPD assembly was investigated, It was found that Au bumps on driver IC's were not bonded to the glass substrate when the bonding temperature was below $140^{\circ}C$ so bonds were made at temperatures of $163^{\circ}C$, $178^{\circ}C$ and $199^{\circ}C$ for further testing. The bonding time and pressure were constant to 3 sec and 3.038 MPa. To test bond reliability, FPD assemblies were subjected to thermal shock storage tests ($-30^{\circ}C$, $1\;Hr\;{\leftrightarrow}80^{\circ}C$, 1 Hr, 10 Cycles) and func! tionality was verified by driver testing. It was found all of FPDs were functional after the thermal cycling. Additionally, Au bumps were bonded using ACF's with higher conductive particle densities at bonding temperatures above $163^{\circ}C$. From the experimental results, when the bonding temperature was increased from $163^{\circ}C$ to $199^{\circ}C$, the curing time could be reduced and more conductive particles were retained at the bonding interface between the Au bump and glass substrate.

Surface Morphology and Thickness Distribution of the Non-cyanide Au Bumps with Variations of the Electroplating Current Density and the Bath Temperature (도금전류밀도 및 도금액 온도에 따른 비시안계 Au 범프의 표면 형상과 높이 분포도)

  • Choi, Eun-Kyung;Oh, Tae-Sung;Englemann, G.
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.4
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    • pp.77-84
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    • 2006
  • Surface roughness and wafer-level thickness distribution of the non-cyanide Au bumps were characterized with variations of the electroplating current density and the bath temperature. The Au bumps, electroplated at $3mA/cm^{2}\;and\;5mA/cm^{2}$, exhibited the surface roughness of $80{\sim}100nm$ without depending on the bath temperature of $40^{\circ}C\;and\;60^{\circ}C$. The Au bumps, electroplated with $8mA/cm^{2}$ at $40^{\circ}C\;and60^{\circ}C$, exhibited the surface roughness of 800nm and $80{\sim}100nm$, respectively. Wafer-level thickness deviation of the Au bumps became larger with increasing the current density from $3mA/cm^{2}\;to\;8mA/cm^{2}$. More uniform thickness distribution of the Au bumps was obtained at a bath temperature of $60^{\circ}C$ than that of $40^{\circ}C$.

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Measurement of Local Elastic Properties of Flip-chip Bump Materials using Contact Resonance Force Microscopy (접촉 공진 힘 현미경 기술을 이용한 플립 칩 범프 재료의 국부 탄성계수 측정)

  • Kim, Dae-Hyun;Ahn, Hyo-Sok;Hahn, Junhee
    • Tribology and Lubricants
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    • v.28 no.4
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    • pp.173-177
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    • 2012
  • We used contact resonance force microscopy (CRFM) technique to determine the quantitative elastic properties of multiple materials integrated on the sub micrometer scale. The CRFM approach measures the frequencies of an AFM cantilever's first two flexural resonances while in contact with a material. The plain strain modulus of an unknown or test material can be obtained by comparing the resonant spectrum of the test material to that of a reference material. In this study we examined the following bumping materials for flip chip by using copper electrode as a reference material: NiP, Solder (Sn-Au-Cu alloy) and under filled epoxy. Data were analyzed by conventional beam dynamics and contact dynamics. The results showed a good agreement (~15% difference) with corresponding values determined by nanoindentaion. These results provide insight into the use of CRFM methods to attain reliable and accurate measurements of elastic properties of materials on the nanoscale.

Surface Morphology and Preferred Orientation of Gold Bump Layer formed by using $Na_3[Au(SO_3)_2]$ (아황산금나트륨염을 이용한 Au 범프용 금도금층의 표면형상 및 우선적 결정 성장방향)

  • Kim, In-Su;Yang, Seong-Hun;Park, Jong-Wan
    • Korean Journal of Materials Research
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    • v.5 no.6
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    • pp.673-681
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    • 1995
  • Surface morphology and preferred orientation of 20${\mu}{\textrm}{m}$ gold electrodeposit formed from aqueous solution of the sodium gold sulfite were studied in terms of current density, plating temperature and Au concentration. As the current density changed from 13.0mA/$\textrm{cm}^2$ to 4.6mA/$\textrm{cm}^2$, the solution temperature from 3$0^{\circ}C$ to 6$0^{\circ}C$, pH from 12.0 to 9.0, agitation speed from 0 rpm to 3200rpm and Au concentration from 10g/1 to 14 g/1, local Au concentration near the cathodic surface increased. With increasing the Au concentration, the surface morphology chanced from porous structure to fine-grained structure. Furthermore, it was observed that the preferred orentation of the Au layer changed from (111) to (220) upon the same variation In the Au concentration. The surface morphology and the preferred orientation of the Au layer were found to be closely related to each other.

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A Study on Electroless Palladium Layer Characteristics and Its Diffusion in the Electroless Palladium Immersion Gold (EPIG) Surface Treatment for Fine Pitch Flip Chip Package (미세피치 플립칩 패키지 구현을 위한 EPIG 표면처리에서의 무전해 팔라듐 피막특성 및 확산에 관한 연구)

  • Hur, Jin-Young;Lee, Chang-Myeon;Koo, Seok-Bon;Jeon, Jun-Mi;Lee, Hong-Kee
    • Journal of the Korean institute of surface engineering
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    • v.50 no.3
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    • pp.170-176
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    • 2017
  • EPIG (Electroless Pd/immersion Au) process was studied to replace ENIG (electroless Ni/immersion Au) and ENEPIG (electroless Ni/electroless Pd/immersion Au) processes for bump surface treatment used in high reliable flip chip packages. The palladium and gold layers formed by EPIG process were uniform with thickness of 125 nm and 34.5 nm, respectively. EPAG (Electroless Pd/autocatalytic Au) also produced even layers of palladium and gold with the thickness of 115 nm and 100 nm. TEM results exhibited that the gold layer in EPIG surface had crystalline structure while the palladium layer was amorphous one. After annealing at 250 nm, XPS analysis indicated that the palladium layer with thickness more than 22~33 nm could act as a diffusion barrier of copper interconnects. As a result of comparing the chip shear strength obtained from ENIG and EPIG surfaces, it was confirmed that the bonding strength was similar each other as 12.337 kg and 12.330 kg, respectively.

Ni/Au Electroless Plating for Solder Bump Formation in Flip Chip (Flip Chip의 Solder Bump 형성을 위한 Ni/Au 무전해 도금 공정 연구)

  • Jo, Min-Gyo;O, Mu-Hyeong;Lee, Won-Hae;Park, Jong-Wan
    • Korean Journal of Materials Research
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    • v.6 no.7
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    • pp.700-708
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    • 1996
  • Electroless plating technique was utilized to flip chip bonding to improve surface mount characteristics. Each step of plating procedure was studied in terms pf pH, plating temperature and plating time. Al patterned 4 inch Si wafers were used as substrstes and zincate was used as an activation solution. Heat treatment was carried out for all the specimens in the temperature range from room temperature to $400^{\circ}C$ for $30^{\circ}C$ minutes in a vacuum furnace. Homogeneous distribution of Zn particles of size was obtained by the zincate treatment with pH 13 ~ 13.5, solution concentration of 15 ~ 25% at room temperature. The plating rates for both Ni-P and Au electroless plating steps increased with increasing the plating temperature and pH. The main crystallization planes of the plated Au were found to be (111) a pH 7 and (200) and (111) at pH 9 independent of the annealing temperature.

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Modeling of Soldering Proess using Longitudinal Thermosonic Method (종방향 열초음파 방법을 이용한 솔더링 공정의 모델링)

  • 김정호;이지혜;유중돈;최두선
    • Proceedings of the KWS Conference
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    • 2003.05a
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    • pp.224-227
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    • 2003
  • The longitudinal thermosonic bonding method is investigated in this work for its application to the soldering process for electronic packaging. The effect of the ultrasonic is analyzed through lumped modeling, and the material properties of a viscoelastic model are measured experimentally. The thermosonic bonding method is verified by inserting the Cu pin and Au bump into solder block. As the solder thickness decreases, temperature of the solder is calculated to increase rapidly because of larger strain. Localized heating due to ultrasonic vibration is observed to melt the solder near the pin, which is adequate to the high density electronic package and Pb-free solder having high melting temperature.

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