• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.6
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• pp.736-743
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• 2020

Modular multiplication is one of the most important arithmetic operations in public-key cryptography such as elliptic curve cryptography (ECC) and RSA, and the performance of modular multiplier is a key factor influencing the performance of public-key cryptographic hardware. An efficient hardware implementation of word-based Montgomery modular multiplication algorithm is described in this paper. Our modular multiplier was designed to support eleven field sizes for prime field GF(p) and binary field GF(2k) as defined by SEC2 standard for ECC, making it suitable for lightweight hardware implementations of ECC processors. The proposed architecture employs pipeline scheme between the partial product generation and addition operation and the modular reduction operation to reduce the clock cycles required to compute modular multiplication by 50%. The hardware operation of our modular multiplier was demonstrated by FPGA verification. When synthesized with a 65-nm CMOS cell library, it was realized with 33,635 gate equivalents, and the maximum operating clock frequency was estimated at 147 MHz.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.2
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• pp.49-61
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• 2009

Finite Field multiplication operation is one of the most important operations in the finite field arithmetic. Recently, Fan and Dai introduced a Shifted Polynomial Basis(SPB) and construct a non-pipeline bit-parallel multiplier for $F_{2^n}$. In this paper, we propose a new bit-parallel shifted polynomial basis type I and type II multipliers for $F_{2^n}$ defined by an irreducible trinomial $x^{n}+x^{k}+1$. The proposed type I multiplier has more efficient the space and time complexity than the previous ones. And, proposed type II multiplier have a smaller space complexity than all previously SPB multiplier(include our type I multiplier). However, the time complexity of proposed type II is increased by 1 XOR time-delay in the worst case.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.20 no.4
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• pp.17-24
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• 2010

A differential fault attack(DFA) is one of the most efficient side channel attacks on block ciphers. Almost all block ciphers, such as DES, AES, ARIA, SEED and so on., have been analysed by this attack. In the case of the known DFAs on SEED, the attacker induces permanent faults on a whole left register of round 16. In this paper, we analyse SEED against DFA with differential characteristics and addition-XOR characteristics of the round function of SEED. The fault assumption of our attack is that the attacker induces 1-bit faults on a particular register. By using our attack, we can recover last round keys and the master key with about $2^{32}$ simple arithmetic operations. It can be simulated on general PC within about a couple of second.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.323-330
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• 2021

Recently, the advantages of high-speed arithmetic in quantum computers have been known, and interest in quantum circuits utilizing qubits has increased. The Grover algorithm is a quantum algorithm that can reduce n-bit security level symmetric key cryptography and hash functions to n/2-bit security level. Since the Grover algorithm work on quantum computers, the symmetric cryptographic technique and hash function to be applied must be implemented in a quantum circuit. This is the motivation for these studies, and recently, research on implementing symmetric cryptographic technique and hash functions in quantum circuits has been actively conducted. However, at present, in a situation where the number of qubits is limited, we are interested in implementing with the minimum number of qubits and aim for efficient implementation. In this paper, the domestic hash function LSH is efficiently implemented using qubits recycling and pre-computation. Also, major operations such as Mix and Final were efficiently implemented as quantum circuits using ProjectQ, a quantum programming tool provided by IBM, and the quantum resources required for this were evaluated.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.12
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• pp.1904-1913
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• 2021

With the proliferation of smart phones and the development of IoT technology, it has become possible to collect personal data for public purposes. However, users are afraid of voluntarily providing their private data due to privacy issues. To remedy this problem, mainly three techniques have been studied: data disturbance, traditional encryption, and homomorphic encryption. In this work, we perform simulations to compare them in terms of accuracy, message length, and computation delay. Experiment results show that the data disturbance method is fast and inaccurate while the traditional encryption method is accurate and slow. Similar to traditional encryption algorithms, the homomorphic encryption algorithm is relatively effective in privacy preserving because it allows computing encrypted data without decryption, but it requires high computation costs as well. However, its main cost, arithmetic operations, can be processed in parallel. Also, data analysis using the homomorphic encryption needs to do decryption only once at any number of data.

• Journal of the Korea Society of Computer and Information
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• v.28 no.2
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• pp.69-75
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• 2023

Finite field arithmetic operations play an important role in a variety of applications, including modern cryptography and error correction codes. In this paper, we propose an efficient multiplication algorithm over finite fields using the Montgomery multiplication algorithm. Existing multipliers can be implemented using AND and XOR gates, but in order to reduce time and space complexity, we propose an algorithm using NAND and NOR gates. Also, based on the proposed algorithm, an efficient semi-systolic finite field multiplier with low space and low latency is proposed. The proposed multiplier has a lower area-time complexity than the existing multipliers. Compared to existing structures, the proposed multiplier over finite fields reduces space-time complexity by about 71%, 66%, and 33% compared to the multipliers of Chiou et al., Huang et al., and Kim-Jeon. As a result, our multiplier is proper for VLSI and can be successfully implemented as an essential module for various applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.8C
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• pp.575-582
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• 2008

In this paper we described the process and the results of real-time implementation of G.729.1 wideband speech codec which is standardized in SG15 of ITU-T. To apply the codec on ARM926EJ-S(R) processor core. we transformed some parts of the codec C program including basic operations and arithmetic functions into assembly language to operate the codec in real-time. G.729.1 is the standard wideband speech codec of ITU-T having variable bit rates of $8{\sim}32kbps$ and inputs quantized 16 bits PCM signal per sample at the rate of 8kHz or 16kHz sampling. This codec is interoperable with the G.729 and G.729A and the bandwidth extended wideband($50{\sim}7,000Hz$) version of existing narrowband($300{\sim}3,400Hz$) codec to enhance voice quality. The implemented G.729.1 wideband speech codec has the complexity of 31.2 MCPS for encoder and 22.8 MCPS for decoder and the execution time of the codec takes 11.5ms total on the target with 6.75ms and 4.76ms respectively. Also this codec was tested bit by bit exactly against all set of test vectors provided by ITU-T and passed all the test vectors. Besides the codec operated well on the Internet phone in real-time.

• Journal of Gifted/Talented Education
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• v.24 no.1
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• pp.17-43
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• 2014

On the subjects of elementary 3rd grade three child prodigies who had learned the four fundamental arithmetic operations and primary concepts of fraction, this study conducted a qualitative case research to examine how they composed schema of addition and multiplication of fractions and transformed schema through recognition of precise concepts and linking of concepts with addition and multiplication of fractions as the contents. That is to say, this study investigates what schema and transformed schema child prodigies form through composition of primary mathematic concepts to succeed in relational understanding of addition and multiplication of fractions, how they use their own formed schema and transformed schema for themselves to approach solutions to problems with addition and multiplication of fractions, and how the subjects' concept formation and schema in their problem solving competence proceed to carry out transformations. As a result, we can tell that precise recognition of primary concepts, schema, and transformed schema work as crucial factors when addition of fractions is associated with multiplication of fractions, and then that the schema and transformed schema that result from the connection among primary mathematic concepts and the precise recognition of the primary concepts play more important roles than any other factors in creative problem solving with respect to addition and multiplication of fractions.

• Journal of IKEEE
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• v.24 no.3
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• pp.901-908
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• 2020

This paper describes a method for scalable hardware implementation of modular inversion. The proposed scalable architecture has a one-dimensional array of processing elements (PEs) that perform arithmetic operations in 32-bit word, and its performance and hardware size can be adjusted depending on the number of PEs used. The hardware operation of the scalable processor for modular inversion was verified by implementing it on Spartan-6 FPGA device. As a result of logic synthesis with a 180-nm CMOS standard cells, the operating frequency was estimated to be in the range of 167 to 131 MHz and the gate counts were in the range of 60,000 to 91,000 gate equivalents when the number of PEs was in the range of 1 to 10. When calculating 256-bit modular inverse, the average performance was 18.7 to 118.2 Mbps, depending on the number of PEs in the range of 1 to 10. Since our scalable architecture for computing modular inversion in GF(p) has the trade-off relationship between performance and hardware complexity depending on the number of PEs used, it can be used to efficiently implement modular inversion processor optimized for performance and hardware complexity required by applications.

• Journal of Physiology & Pathology in Korean Medicine
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• v.28 no.6
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• pp.674-682
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• 2014

The purpose of this study was to identify the effect of applying oriental music therapy and reliability of electroencephalogram(EEG) equipment. The study was approved by the critical trial judge committee from ${\bigcirc}{\bigcirc}$(IRB No. 2013-07) university. In order to measure test-retest reliability for 15 subjects, EEG for same participants were measured using same method mentioned above after 2 hours from the first measurement. Same provider implemented to each person at same time. Firstly, EEG was measured for 5 minutes after the subject with attached electrodes sat on chair comfortably for 10 minutes. Then, the subject was given mental stress using the four fundamental arithmetic operations for 5 minutes, and measured EEG for another 5 minutes. After that the subject sat on the chair comfortably listening oriental medicine music therapy for 5 minutes, and EEG was measured for 5 minutes again. There was no side effect regarding music therapy reported. Raw data, which was measured in each step, were converted through FFT(fast fourier transform) and analyzed after divided into certain frequency including ${\alpha}$ wave, ${\beta}$ wave, ${\theta}$ wave, immersion wave, stabilization wave, sef100 wave, and sef95 wave. Data were analyzed using wilcoxon signed rank test, Intraclass correlation coefficient(ICC), repeated measures ANOVA with the SPSS program. In test-retes method, there were significantly differences in ${\alpha}$ wave, ${\beta}$ wave, immersion wave, stability wave, ${\theta}$ wave, sef100 wave, sef95 wave. ICC has shown a high degree of reliability that it was ${\alpha}$ wave .877, ${\beta}$ wave .855, ${\gamma}$ wave .895, immersion wave .897, stability wave .816, ${\theta}$ wave .904, sef100 wave .910, sef95 wave .776. Also, there was a statistically significant difference in ${\alpha}$ wave after applying oriental music therapy. Based on these results, it is considered that average of the channel EEG and application of oriental music therapy would be practiced by increase of sample size using this machine.