Browse > Article
http://dx.doi.org/10.13089/JKIISC.2009.19.2.49

Efficient Bit-Parallel Shifted Polynomial Basis Multipliers for All Irreducible Trinomial  

Chang, Nam-Su (Korea University)
Kim, Chang-Han (Semyung University)
Hong, Seok-Hie (Korea University)
Park, Young-Ho (Sejong Cyber University)
Abstract
Finite Field multiplication operation is one of the most important operations in the finite field arithmetic. Recently, Fan and Dai introduced a Shifted Polynomial Basis(SPB) and construct a non-pipeline bit-parallel multiplier for $F_{2^n}$. In this paper, we propose a new bit-parallel shifted polynomial basis type I and type II multipliers for $F_{2^n}$ defined by an irreducible trinomial $x^{n}+x^{k}+1$. The proposed type I multiplier has more efficient the space and time complexity than the previous ones. And, proposed type II multiplier have a smaller space complexity than all previously SPB multiplier(include our type I multiplier). However, the time complexity of proposed type II is increased by 1 XOR time-delay in the worst case.
Keywords
Shifted Polynomial Basis; Irreducible Trinomial; Mastrovito Multiplier; Bit-Parallel Multiplier;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
연도 인용수 순위
1 이옥석, 장남수,김창한, 홍석회,"Equally Spaced 기약다항식 기반의 효율적인 이진체 비트-병렬 곱셈기", 정보보호학회논문지,18(2),pp3-10, 2008년 4월
2 정석원, 이선옥, 김창한,"삼향 기약다항식을 이용한 효율적인 비트-병렬 구조의 곱셈기", 정보보호학회논문지,13(5),pp179-187,2003년 10월
3 정석원, 윤중철, 이선옥,"GF(2n)에서의 직렬-병렬 곱셈기 구조",정보보호학회논문지,13(3),pp27-34,2003년 6월
4 A. Reyhani-Masoleh and M.A. Hasan, "Low complexity bit parallel architectu res for polynomial basis multiplication over GF(2n ) ," IEEE Trans. Computer s., vol. 53, no. 8, pp. 945-959, Aug. 2004   DOI   ScienceOn
5 H. Fan and Y. Dai, 'Fast bit parallel GF(2n) multiplier for all trinomials," IEEE Trans. Computers., vol. 54, no. 4, pp. 485-490, Apr. 2005   DOI   ScienceOn
6 H. Fan and M.A. Hasan, "Relationshi p between GP(2n) Montgomery and shi fted polynomial basis multiplication al gorithms," IEEE Tran s. Computers., vol. 55, no. 9, pp. 1202-1206, Sep. 2006   DOI   ScienceOn
7 H. Fan and M.A. Hasan, "Fast Bit Parallel Shifted Polynomial Basis Multipliers inGP(2n)," IEEE Trans. Circuits & Systems-I, vol. 53, no. 12, pp. 2606-2615,Dec. 2006   DOI   ScienceOn
8 C. Negre, "Efficient parallel multiplier in shifted polynomial basis," Journal of Systems Architecture, vol. 53, no. 2-3, pp. 109 -116, Feb. 2007   DOI   ScienceOn