• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.6
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• pp.506-515
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• 1990

The major purpose of this thesis is suggest the simulation algorithm for performance analysis of throughput of slotted 1-persistent CSMA/CD bus protocol in Local Area Networks. The suggested simulation algorithm processes the effect of each station group that classified by the number of collision experience. Therefore, this simulation algorithm is more effective in terms of the execute than existing algorithm that processed the effect of each station. This study suggests the method for application to the busy/idle generator.

• Journal of the Korean Society for Aviation and Aeronautics
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• v.31 no.4
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• pp.7-18
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• 2023

The continuous increase in air traffic emphasizes the importance of capacity calculation. Research on the calculation method of Terminal Control Area (TMA) capacity has been treated as a partial aspect of the airspace sector capacity or has been limitedly studied. This study aims to propose a mathematical model for calculating TMA capacity, taking into account the Standard Terminal Arrival Route (STAR), separation standards, TMA entry speed, and runway threshold passing speed. The proposed model has the advantage of being able to calculate the instantaneous arrival capacity, which has not been noted in previous studies, along with the throughput. Additionally, it is meaningful as the model can easily calculate the arrival capacity of the TMA considering airport construction, runway expansion, or new procedures.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.7
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• pp.9-16
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• 2011

In this paper, various kinds of high throughput turbo decoding schemes are introduced, and a new turbo decoding scheme using the advantages of each scheme is proposed. The proposed scheme uses the decoding structure of double flow scheme, sliding window scheme and shuffled turbo decoding scheme. Simulation results show that the proposed scheme offers a BER performance equivalent to those of existing turbo decoding schemes with less clock cycles. We also show that the required memory can be reduced by choosing proper size of sliding window. Consequently, we can design a high throughput turbo decoder requiring low power and low area.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.1C
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• pp.113-119
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• 2009

The training sequence with the appropriate length for equalization and initial synchronization is necessary before sending the pure data in the burst transmission type DS-UWB system. The length of the training sequence is one of the factors which make throughput decreased. The noble structure with the variable length of the training sequence whose length can be adaptively tailored according to the channel conditions (CM1,CM2,CM3,CM4) in the DS-USB systems is proposed. This structure can increase the throughput without sacrificing the performance than the method with fixed length of training sequence considering the worst case channel conditions. Simulation results under IEEE 802.15.3a channel model show that the proposed scheme can achieve higher throughput than a conventional one with the slight loss of BER performance. And this structure can reduce the computation complexity and power consumption with selecting the short length of the training sequence.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.578-582
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• 2005

This paper describes MAC schemes for QoS enhancement taking into account the traffic characteristics and network states over IEEE 802.11 wireless networks. Our approach uses AR as a Backoff parameter and to slide IFS adaptively for increasing the medium utilization ratio and throughput, and providing fairness. In addition, we evaluate through simulations using NS-2 the performance of proposed MAC scheme and compare it with other MAC schemes.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.10
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• pp.1460-1468
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• 2015

As the number of IoT service increases, the interest of lightweight block cipher algorithm, which consists of simple operations with low-power and high speed, is growing. LEA(Leightweight Encryption Algorithm) is recently adopted as one of lightweight encryption standards in Korea. In this paper a pipeline LEA architecture is proposed to process large amounts of data with high throughput. The proposed pipeline LEA can communicate with external modules in the 32-bit I/O interface. It consists of input, output and encryption pipeline stages which take 4 cycles using a muti-cycle pipeline technique. The experimental results showed that the proposed pipeline LEA achieved more than 7.5 Gbps even though the key length was varied. Compared with the previous high speed LEA in accordance with key length of 128, 192, and 256 bits, the throughput of the pipeline LEA was improved 6.45, 7.52, and 8.6 times. Also the throughput per area was improved 2, 1.82, and 2.1 times better than the previous one.

• Journal of the Korea Society for Simulation
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• v.21 no.2
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• pp.51-58
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• 2012

In IEEE 802.16j MMR protocol, two modes about usage of RS are proposed; one is transparent mode to enhance data throughput and the other is non-transparent mode to extend coverage. In this paper, we focus on non-transparent mode and find that the mode can also improve data throughput. Therefore, we analyze data throughput on various RS topology and their extended coverage area by simulation in IEEE 802.16j non-transparent mode. We also compare the simulation results with the single MR-BS system of which coverage is extended by higher transmission power. From the comparisons of simulation results, we see that higher throughput can be obtained in the proposed non-transparent mode.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.2
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• pp.455-461
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• 2008

Enhanced Distributed Channel Access (EDCA) is a channel access scheme adopted by the IEEE 802.11e draft standard for QoS-enabled wireless local area networks. It classifies traffic into separate Access Categories (ACs) and achieves service differentiation by allowing each AC to have its own values of channel access parameters. This paper proposes a scheme to dynamically adapt the EDCA parameters to traffic environment so that they both maximize the throughput of non real-time traffics and meet the delay and throughput constraints of real-time traffics. For this purpose, we develop a design algorithm for efficient exploration of the EDCA parameter space. Using the algorithm, we derive a Pareto curve fur delay-throughput trade-off in each anticipated traffic environment. The Pareto database can then be used to optimally adjust the parameter according to the traffic environment and administrative policies. Simulation results show that compared with the default parameter configuration, the proposed scheme is better for delay, throughput guarantee and can improve the throughput of non real-time traffics by 12% on average.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.7
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• pp.29-35
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• 2017

This paper presents a high-throughput area-efficient mixed-radix fast Fourier transform (FFT) processor using the efficient scheduling schemes. The proposed FFT processor can support 64, 128, 256, and 512-point FFTs for orthogonal frequency division multiplexing (OFDM) systems, and can achieve a high throughput using mixed-radix algorithm and eight-parallel multipath delay commutator (MDC) architecture. This paper proposes new scheduling schemes to reduce the size of read-only memories (ROMs) and complex constant multipliers without increasing delay elements and computation cycles; thus, reducing the hardware complexity further. The proposed mixed-radix MDC FFT processor is designed and implemented using the Samsung 65nm complementary metal-oxide semiconductor (CMOS) technology. The experimental result shows that the area of the proposed FFT processor is 0.36 mm2. Furthermore, the proposed processor can achieve high throughput rates of up to 2.64 GSample/s at 330 MHz.

• Korean Journal of Materials Research
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• v.25 no.12
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• pp.647-654
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• 2015

Self-assembled monolayers(SAM) of microspheres such as silica and polystyrene(PS) beads have found widespread application in photonic crystals, sensors, and lithographic masks or templates. From a practical viewpoint, setting up a high-throughput process to form a SAM over large areas in a controllable manner is a key challenging issue. Various methods have been suggested including drop casting, spin coating, Langmuir Blodgett, and convective self-assembly(CSA) techniques. Among these, the CSA method has recently attracted attention due to its potential scalability to an automated high-throughput process. By controlling various parameters, this process can be precisely tuned to achieve well-ordered arrays of microspheres. In this study, using a restricted meniscus CSA method, we systematically investigate the effect of the processing parameters on the formation of large area self-assembled monolayers of PS beads. A way to provide hydrophilicity, a prerequisite for a CSA, to the surface of a hydrophobic photoresist layer, is presented in order to apply the SAM of the PS beads as a mask for photonic nanojet lithography.