• Title/Summary/Keyword: Analog-Digital conversion

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A CMOS Digital-to-Analog Converter to Apply a Newly-Developed Digital-to-Analog Conversion Algorithm (새로운 디지털-아날로그 변환알고리즘을 적용한 CMOS 디지털-아날로그 변환기)

  • 송명호
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.9
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    • pp.57-63
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    • 1998
  • This paper describes a CMOS digital-to-analog converter to apply a newly-developed digital-to-analog conversion algorithm. The CMOS digital-to-analog converter has been designed by using 1.2$\mu\textrm{m}$ MOSIS SCMOS parameter and simulated for the performance. The simulated results have shown that the digital-to-analog converter has 200MHz of the maximum conversion rate, 7.41mW of the DC power consumption, and ${\pm}$0.08LSB of INL and ${\pm}$0.098LSB of DNL in 8-b.

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Design of A High-Speed Current-Mode Analog-to-Digital Converter (고속 전류 구동 Analog-to-digital 변환기의 설계)

  • 조열호;손한웅;백준현;민병무;김수원
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.7
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    • pp.42-48
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    • 1994
  • In this paper, a low power and high speed flash Analog-to-Digital Converter using current-mode concept is proposed. Current-mode approach offers a number of advantages over conventional voltage-mode approach, such as lower power consumption small chip area improved accuracy etc. Rescently this concept was applied to algorithmic A/D Converter. But, its conversion speed is limited to medium speed. Consequently this converter is not applicable to the high speed signal processing system. This ADC is fabricated in 1.2um double metal CMOS standard process. This ADC's conversion time is measured to be 7MHz, and power consumption is 2.0mW, and differential nonlinearity is less than 1.14LSB and total harmonic distortion is -50dB. The active area of analog chip is about 350 x 550u$m^2$. The proposed ADC seems suitable for a single chip design of digital signal processing system required high conversion speed, high resolution small chip area and low power consumption.

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Co60 Gamma-Ray Effects on the DAC-7512E 12-Bit Serial Digital to Analog Converter for Space Power Applications

  • Shin, Goo-Hwan
    • Journal of Electrical Engineering and Technology
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    • v.9 no.6
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    • pp.2065-2069
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    • 2014
  • The DAC-7512E is a 12-bit digital to analog converter that is low power and a single package with internal buffers. The DAC-7512E takes up minimal PCB area for applications of space power electronics design. The spacecraft mass is a crucial point considering spacecraft launch into space. Therefore, we have performed a TID test for the DAC-7512E 12-bit serial input digital to analog converter to reduce the spacecraft mass by using a low-level Gamma-ray irradiator with $Co^{60}$ gamma-ray sources. The irradiation with $Co^{60}$ gamma-rays was carried out at doses from 0 krad to 100 krad to check the error status of the device in terms of current, voltage and bit error status during conversion. The DAC-7512E 12-bit serial digital to analog converter should work properly from 0 krad to 30 krad without any error.

연속 근사형 전하 전달 A/D 변환기

  • 박종안;문용선
    • Proceedings of the Korean Institute of Communication Sciences Conference
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    • 1986.10a
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    • pp.68-71
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    • 1986
  • A new circuit configuration for charge-balancing successive approximation Analog-to-Digital converters is described. This consists of a improved successive approximation register(SAR) and a weighted capacitor Digital-to-Analog converter (WCDAC). Due to the inherent conversion property of the WCDAC, the A/D converter using the WCDAC can be simply implemented by successive approximation conversion method, and 4bit monotonicity conversion with differential nonlinearity less 1/2LSB is completed in 80 US.

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A Study of Real-Time Implementation of Audio/Data Processor for Digital/Analog Dual mode Mobile Phone (디지탈/아날로그 겸용 이동통신 단말기를 위한 오디오/데이타 프로세서의 실시간 구현에 관한 연구)

  • Byun, Kyung-Jin;Kim, Jong-Jae;Han, Ki-Chun;Yoo, Hah-Young;Cha, Jin-Jong;Kim, Kyung-Su
    • The Journal of the Acoustical Society of Korea
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    • v.16 no.2
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    • pp.80-88
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    • 1997
  • In this paper, the implementation of audio/data processor using ETRI DSP to support analog mode in digital/analog dual mode mobile phone is presented. Audio/data processor performs the wideband data processing, audio signal processing, demodulation function, and data rate conversion when it is operated in analog mode. These functions are programmed in assembly language, and then loaded to ETRI DSP together with vocoder program for the digital mode operation. This is a very efficient implementation of the dual mode cellular phone ASIC since the vocoder for the digital mode and audio/data processor for the analog mode are programmed together in the same hardware.

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Optimal equivalent-time sampling for periodic complex signals with digital down-conversion

  • Kyung-Won Kim;Heon-Kook Kwon;Myung-Don Kim
    • ETRI Journal
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    • v.46 no.2
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    • pp.238-249
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    • 2024
  • Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.

Optical Neural-Net Analog-to-Digital Converter:Implementation and Application (광신경망 A/D변환기:구현 및 응용)

  • 장주석;고상호;이수영;신상영
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.38 no.10
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    • pp.795-804
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    • 1989
  • A parallel analog-to digital converter with neuron-like elements is designed and optically implemented. Its operation principle is based on the simultaneous estimation of bit values for a given analog input. The architecture of the proposed analog-to-digital converter is simpler than that of an earlier one designed by the energy minimization technique, and its digital output is independent of the initial state. Mixed binary-to-full binary converters are also designed by using out analog-to-digital converters as basic computing elements. These converters have simple structures and fast conversion times compared with earlier ones.

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A New Ripple Analog-to-Digital Converter (새로운 리플 아날로그-디지털 변환기)

  • 차형우;정원섭
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.8
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    • pp.1255-1259
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    • 1990
  • A new ripple analog-to-digital converter (ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the analog input signal in two serial steps. First, a coarse conversion is made to determine the most significant bits by the first parallel ADC. The resultant bits control the switching network to connect a series resistor segment, within which the analog signal is contained, to the second parallel ADC. At second step, a fine conversion is made to determine the least significant bits by the second parallel ADC. The circuit requires 2(2\ulcorner\ulcorner1) comparators, 2(2\ulcorner\ulcorner resistors, and 2(2\ulcorner\ulcorner swithches for N-bit resolution.

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Digital Transmission and Isolation of Multichannel Analog Signals using a Single Optocoupler (옵토커플러의 절연을 이용한 멀티채널 아날로그 신호의 디지털 전송)

  • Nam, Jin Moon
    • The Journal of the Convergence on Culture Technology
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    • v.4 no.4
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    • pp.379-385
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    • 2018
  • The transmission of analog signals through Galvanic isolators often results in signal distortion. Optocoupler gain is temperature dependent and also varies considerably, which would cause deformations of analog signals. Digital isolators have better noise immunity than analog, and digital transmission is a cost-effective noise rejection method for multichannel analog signals, which can solve temperature-induced signal distortion problems. Digital data, converted from multichannel analog signals, can be transmitted through a single optocoupler. We proposed advanced circuits and data frame for robust transmission of multichannel analog signals. Numerical experiments were performed to investigate distortion of multichannel analog signals during transmission.

Developement of a 3 channel digital CVSD bit-rate converter using a general purpose DSP (범용 DSP를 이용한 3 채널 디지탈 CVSD 전송율 변환기 개발)

  • 최용수;강홍구;김성윤;박영철;윤대희
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.2
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    • pp.306-317
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    • 1997
  • This ppaer presents a bit-rate conversion system for efficient communications between 3 channel CVSD systems with different bit-rates. The proposed conversion system is implemented in the digital domain and specially, the conversion problem between 32 Kbps and 16 Kbps CVSD systems is studied. The conventional conversion system implemented in the analog domain allows signals to be easily degraded by external noises. To overcome this problem, a digital CVSD bit-rate conversion system robust to external noises is developed. the new systemdecodes CVSD bit sequences and converts sampling rates of decoded signals, then encodes signals at target bit-rates. Since linear phase property does not matter in this application, instead of FIR filters a IIR filter is employed to reduce the system complexity. Therefore, a 3 channel digital CVSD bit-rate conversion system was successfully real-time implemented using a general purpose DSP. In addition, conversion problems with unkown time constants were experimented and good experimental results were obtained.

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