• Title/Summary/Keyword: Analog digital converter

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Design of a Digital PWM Controller for a Soft Switching SEPIC Converter

  • Nashed, Maged N.F.
    • Journal of Power Electronics
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    • v.4 no.3
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    • pp.152-160
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    • 2004
  • This paper presents analysis, modeling, and design of a low-harmonic, isolated, active-clamped SEPIC for future avionics applications. Simpler converter dynamics, high switching frequency, zero voltage-Transition-PWM switching, and a single-layer transformer construction result. This paper describes complete design of a digital controller for a high-frequency switching power supply. Guidelines for the minimum required resolution of the analog-to-digital converter, the pulse-width modulator, and the fixed-point computational unit is derived. A design example based on a SEPIC converter operating at the high switching frequency is presented. The controller design is based on direct digital design approach and standard root-locus techniques.

Development of the Natural Frequency Analysis System to Examine the Defects of Metal Parts (금속 부품의 결함 판단을 위한 고유 주파수 분석 시스템 개발)

  • Lee, Chung Suk;Kim, Jin Young;Kang, Joonhee
    • Journal of Sensor Science and Technology
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    • v.24 no.3
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    • pp.169-174
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    • 2015
  • In this study, we developed a system to detect the various defects in the metallic objects using the phenomenon that the defects cause the changes of the natural resonant frequencies. Our system consists of a FFT Amp, an Auto Impact Hammer, a Hammer controller and a PC. Auto Impact Hammer creates vibrations in the metallic objects when tapped on the surface. These vibrational signals are converted to the voltage signals by an acceleration sensor attached to the metallic part surface. These analog voltage signals were fed into an ADC (analog-digital converter) and an FFT (fast fourier transform) conversion in the FFT Amp to obtain the digital data in the frequency domain. Labview graphical program was used to process the digital data from th FFT amp to display the spectrum. We compared those spectra with the standard spectrum to find the shifts in the resonant frequencies of the metal parts, and thus detecting the defects. We used PCB's acceleration sensor and TI's TMS320F28335 DSP (digital signal processor) to obtain the resolution of 2.93 Hz and to analyze the frequencies up to 44 kHz.

Realization of Readout Circuit Through Integrator to Average MCT Photodetector Signals of Noncontact Chemical Agent Detector (비접촉 화학작용제 검출기의 MCT 광검출기를 위한 적분기 기반의 리드아웃 회로 구현)

  • Park, Jae-Hyoun
    • Journal of Sensor Science and Technology
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    • v.31 no.2
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    • pp.115-119
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    • 2022
  • A readout circuit for a mercury-cadmium-telluride (MCT)-amplified mid-wave infrared (IR) photodetector was realized and applied to noncontact chemical agent detectors based on a quantum cascade laser (QCL). The QCL emitted 250 times for each wavelength in 0.2-㎛ steps from 8 to 12 ㎛ with a frequency of 100 kHz and duty ratio of 10%. Because of the nonconstant QCL emission power during on-duty, averaging the photodetector signals is essential. Averaging can be performed in digital back-end processing through a high-speed analog-to-digital converter (ADC) or in analog front-end processing through an integrator circuit. In addition, it should be considered that the 250 IR data points should be completely transferred to a PC during each wavelength tuning period of the QCL. To average and minimize the IR data, we designed a readout circuit using the analog front-end processing method. The proposed readout circuit consisted of a switched-capacitor integrator, voltage level shifter, relatively low-speed analog-to-digital converter, and micro-control unit. We confirmed that the MCT photodetector signal according to the QCL source can be accurately read and transferred to the PC without omissions.

A New Ripple Analog - to - Digital Converter (새로운 리플 아나로그-디지틀 변환기)

  • Chung, Won-Sup
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.571-573
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    • 1988
  • A new ripple analog-to-digital converter(ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the input signal in two serial steps. First a coarse conversion is made to determine the most significant bits by the first parallel ADC. The results control a switching network to connect the series resistor segment, the analog signal is contained within, to the second parallel ADC. At second step, a fine conversion is made to determine the least signification bits by the second parallel ADC. The circuit requires 2(2$\frac{N}{2}$) comparators, 2(2$\frac{N}{2}$) resistors, and 2(2$\frac{N}{2}$) switches for N-bit resolution.

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Noise Automatic Gain Control to Stabilize Radar Performance (레이다 성능 안정화를 위한 잡음 AGC)

  • Kim, Kwan-Sung
    • Journal of the Korea Institute of Military Science and Technology
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    • v.10 no.4
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    • pp.132-137
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    • 2007
  • The dynamic range of the radar which uses digital signal processors is limited by ADC(Analog-to-Digital Converter). That parameter and ADC loss depend on the noise level of radar receiver. In order to stabilize the performance of radar systems, it is necessary to maintain the noise level constantly. This paper presents the noise AGC(Automatic Gain Control) concept that can keep the noise level constantly and proves that the concept is acceptable through the hardware test and evaluation.

Discrete Time Domain Modeling and Controller Design of Phase Shifted Full Bridge PWM Converter (위상천이 풀-브릿지 PWM 컨버터의 이산 시간 모델링 및 제어기 설계)

  • Lim, Jeong-Gyu;Lim, Soo-Hyun;Chung, Se-Kyo
    • Proceedings of the KIPE Conference
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    • 2007.07a
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    • pp.135-137
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    • 2007
  • A phase shifted full-bridge PWM converter (PSFBC) has been used as the most popular topology for many applications. But, for the reasons of the cost and performance, the control circuits for the PSFBC have generally been implemented using analog circuits. The studies on the digital control of the PSFBC were recently presented. However, they considered only the digital implementation of the analog controller. This paper presents the modeling and design of the digital controller for the PSFBC in the discrete time domain. The discretized PSFBC model is first derived considering the sampling effect. Based on this model, the digital controller is directly designed in discrete time domain. The simulation and experimental results are provided to verify the proposed modeling and controller design.

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Digital Controller for DC-DC Converters (DC-DC 컨버터를 위한 디지털 방식의 컨트롤러 회로)

  • Hong, Wanki;Kim, Kitae;Kim, Insuck;Roh, Jeongjin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.39-46
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    • 2005
  • A DC-DC converter with digital controller is realized. the digital controller has several advantages such as robustness, fast design time, and high flexibility. however, since the DC-DC output voltage is analog, an analog-to-digital conversion scheme is always essential in all digital controllers. A simple and efficient delta-sigma modulator is used as a conversion scheme in out implementation. The measurement results show good voltage regulation

DIGITAL CONTROL OF SINGLE PHASE BUCK-BOOST CONVERTER BY PULSE AREA MODULATION

  • Kim, T.J.;Byun, Y.B.;Joe, K.Y.;Kim, C.U.
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.654-657
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    • 1998
  • This paper is described a digital implementation of a pulse area modulation (PAM) method for a unity-power-factor buck-boost converter. A digital controller is designed and implemented by a Digital Signal Processor(DSP) to replace the analog control circuit for PAM. Experimental results are presented and compared with simulations.

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Digital Control of Single Phase Buck-Boost Converter by Pulse Amplitude Modulation Mehtod (PAM방식을 적용한 단상 승강압형 정류기의 디지탈제어)

  • 김태진;변영복;조기연;김철우
    • Proceedings of the KIPE Conference
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    • 1998.07a
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    • pp.54-57
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    • 1998
  • This paper describes a digital implementation of a pulse amplitude modulation(PAM) method for a unity-power-factor buck-booster converter. A digital controller is designed and implemented by a Digital Signal Processor(DSP) to replace the analog control circuit for PAM. Experimental results are presented and compared with simulations.

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The analysis of the detection probability of FMCW radar and implementation of signal processing part (차량용 FMCW 레이더의 탐지 성능 분석 및 신호처리부 개발)

  • Kim, Sang-Dong;Hyun, Eu-Gin;Lee, Jong-Hun;Choi, Jun-Hyeok;Park, Jung-Ho;Park, Sang-Hyun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.12
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    • pp.2628-2635
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    • 2010
  • This paper analyzes the detection probability of FMCW (Frequency Modulated Continuous Wave) radar based on Doppler frequency and analog-digital converter bit and designs and implements signal processing part of FMCW radar. For performance evaluation, the FMCW radar system consists of a transmitted part and a received part and uses AWGN channel. The system model is verified through analysis and simulation. Frequency offset occurs in the received part caused by the mismatching between the received signal and the reference signal. In case of Doppler frequency less than about 38KHz, performance degradation of detection does not occur in FMCW radar with 75cm resolution The analog-digital converter needs at least 6 bit in order not to degrade the detection probability. And, we design and implement digital signal processing part based on DDS chip of digital transmitted signal generator for FMCW radar.