• 제목/요약/키워드: Amorphous Silicon (a-Si)

검색결과 488건 처리시간 0.026초

광조사에 따른 비정질 실리콘의 열화 (Light-Induced Degradation of Hydrogenated Amorphous Silicon)

  • 박진석;한민구;이정한
    • 대한전자공학회논문지
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    • 제25권5호
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    • pp.501-508
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    • 1988
  • This paper presents the light-induced effects on the elelctrical and optical properties of undoped and doped hydrogenated amorphous silicon films. The changes in the conductivities and the activation energies of various types of a-Si:H films due to the prolonged exposure to light have been characterized as a function of deposition conditions and illumination periods. The dark conductivity changes may be quenched for heavier doped a-Si:H films. We have also analyzed the variations of micro-structure of a-Si:H film such as silicon-hydrogen bondings in the rocking and stretching modes utilizing infrared spectroscopy. From the experimental results, it is elucidated that doping effects must be crucial to the degradations of the fundamental properties of a-Si:H due to light-induced effects.

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Suppression of silicon clusters using a grid mesh under DC bias

  • Kim, Yonwon;Kang, Jun
    • Journal of Advanced Marine Engineering and Technology
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    • 제41권2호
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    • pp.146-149
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    • 2017
  • Si clusters generated during the plasma chemical vapor deposition (CVD) process have a great influence on the quality of the fabricated films. In particular, in hydrogenated amorphous silicon thin films (a-Si:H) used for thin film solar cells, Si clusters are mainly responsible for light-induced degradation. In this study, we investigated the amount of clusters incorporated into thin films using a quartz crystal microbalance (QCM) and specially designed cluster eliminating filters, and investigated the effect of the DC grid mesh in preventing cluster incorporation. Experimental results showed that as the applied voltage of the grid mesh, which is placed between the electrode and the QCM, decreased, the number of clusters incorporated into the film decreased. This is due to the electrostatic force from the grid mesh bias, and this method is expected to contribute to the fabrication of high-quality thin films by preventing Si cluster incorporation.

비정질 실리콘 박막 트랜지스터의 회로 분석을 위한 해석적 모델링 (Analytical Modeling for Circuit Simulation of Amorphous Silicon Thin Film Transistors)

  • 최홍석;박진석;오창호;한철희;최연익;한민구
    • 대한전기학회논문지
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    • 제40권5호
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    • pp.531-539
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    • 1991
  • We develop an analytical model of the static and the dynamic characteristics of amorphous silicon thin film transistors (a-Si TFTs) in order to incorporate into a widely used circuit simulator such as SPICE. The critical parameters considered in our analytical model of a-Si TFT are the power factor (XN) of saturation source-drain current and the effective channel length (L') at saturation region. The power factor, XN must not always obey so-called

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Effects of Stress Mismatch on the Electrical Characteristics of Amorphous Silicon TFTs for Active-Matrix LCDs

  • Lee, Yeong-Shyang;Chang, Jun-Kai;Lin, Chiung-Wei;Shih, Ching-Chieh;Tsai, Chien-Chien;Fang, Kuo-Lung;Lin, Hun-Tu;Gan, Feng-Yuan
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.729-732
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    • 2006
  • The effect of stress match between silicon nitride ($SiN_2$) and hydrogenated amorphous silicon (a-Si:H) layers on the electrical characteristics of thin-film transistors (TFTs) has been investigated. The result shows that modifying the deposition conditions of a Si:H and $SiN_2$ thin films can reduce the stress mismatch at a-Si:H/SiNx interface. Moreover, for best a-Si:H TFT characteristics, the internal stress of gate $SiN_2$ layer with slightly nitrogen-rich should be matched with that of a-Si:H channel layer. The ON current, field-effect mobility, and stability of TFTs can be enhanced by controlling the stress match between a-Si:H and gate insulator. The improvement of these characteristics appears to be due to both the decrease of the interface state density between the a-Si:H and SiNx layer, and the good dielectric quality of the bottom nitride layer.

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Thermal Conductivity Analysis of Amorphous Silicon Formed by Natural Cooling: A Molecular-dynamics Study

  • Lee, Byoung Min
    • 한국세라믹학회지
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    • 제53권3호
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    • pp.295-300
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    • 2016
  • To investigate the thermal conductivity and the structural properties of naturally cooled excimer-laser annealed Si, molecular-dynamics (MD) simulations have been performed. The thermal conductivity of crystalline Si (c-Si) was measured by direct method at 1000 K. Steady-state heat flow was measured using a stationary temperature profile; significant deviations from Fourier's law were not observed. Reliable processes for measuring the thermal conductivity of c-Si were presented. A natural cooling process to admit heat flow from molten Si (l-Si) to c-Si was performed using an MD cell with a size of $48.9{\times}48.9{\times}97.8{\AA}^3$. During the cooling process, the temperature of the bottom $10{\AA}$ of the MD cell was controlled at 300 K. The results suggest that the natural cooling system described the static structural property of amorphous Si (a-Si) well.

열선 CVD법으로 증착된 비정질 실리콘 박막과 결정질 실리콘 기판 계면의 passivation 특성 분석 (Interface Passivation Properties of Crystalline Silicon Wafer Using Hydrogenated Amorphous Silicon Thin Film by Hot-Wire CVD)

  • 김찬석;정대영;송준용;박상현;조준식;윤경훈;송진수;김동환;이준신;이정철
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2009년도 춘계학술대회 논문집
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    • pp.172-175
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    • 2009
  • n-type crystalline silicon wafers were passivated with intrinsic a-Si:H thin films on both sides using HWCVD. Minority carrier lifetime measurement was used to verify interface passivation properties between a-Si:H thin film and crystalline Si wafer. Thin film interface characteristics were investigated depending on $H_2/SiH_4$ ratio and hot wire deposition temperature. Vacuum annealing were processed after deposition a-Si:H thin films on both sides to investigate thermal effects from post process steps. We noticed the effect of interface passivation properties according to $H_2/SiH_4$ ratio and hot wire deposition temperature, and we had maximum point of minority carrier lifetime at H2/SiH4 10 ratio and $1600^{\circ}C$ wire temperature.

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Signal Generation Due to Alpha Particle in Hydrogenated Amorphous Silicon Radiation Detectors

  • Kim, Ho-Kyung;Gyuseong Cho
    • Nuclear Engineering and Technology
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    • 제28권4호
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    • pp.397-404
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    • 1996
  • The hydrogenated amorphous silicon (a-Si : H) holds good promise for radiation detection from its inherent merits over crystalline counterpart. For the application to alpha spectroscopy, the induced charge collection in a-Si : H pin detector diodes ons simulated based on a relevant non-uniform charge generation model. The simulation was peformed for the initial energy and the range of incident alpha particles, detector thickness and the operational parameters such as the applied reverse bias voltage and shaping time. From the simulation, the total charge collection was strongly affected by hole collection as expected. To get a reasonable signal generation, therefore, the hole collection should be seriously considered for detector operational parameters such as shaping time and reverse voltage etc. For the spectroscopy of alpha particle from common alpha sources, the amorphous silicon should have about 70${\mu}{\textrm}{m}$ thickness.

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능동형 유기 발광 다이오드(AMOLED)에서 발생하는 수소화된 비정질 실리콘 박막 트랜지스터(Hydrogenated Amorphous Silicon Thin Film Transistor)의 이력 (Hysteresis) 현상 (Hysteresis Phenomenon of Hydrogenated Amorphous Silicon Thin Film Transistors for an Active Matrix Organic Light Emitting Diode)

  • 최성환;이재훈;신광섭;박중현;신희선;한민구
    • 전기학회논문지
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    • 제56권1호
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    • pp.112-116
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    • 2007
  • We have investigated the hysteresis phenomenon of a hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and analyzed the effect of hysteresis phenomenon when a-Si:H TFT is a pixel element of active matrix organic light emitting diode (AMOLED). When a-Si:H TFT is addressed to different starting gate voltages, such as 10V and 5V, the measured transfer characteristics with 1uA at $V_{DS}$ = 10V shows that the gate voltage shift of 0.15V is occurred due to the different quantities of trapped charge. When the step gate-voltage in the transfer curve is decreased from 0.5V to 0.05V, the gate-voltage shift is decreased from 0.78V to 0.39V due to the change of charge do-trapping rate. The measured OLED current in the widely used 2-TFT pixel show that a gate-voltage of TFT in the previous frame can influence OLED current in the present frame by 35% due to the change of interface trap density induced by different starting gate voltages.

저온 공정에 의한 a-Si:H/c-Si 이종접합 태양전지 제조 및 동작특성 분석 (Process and Performance Analysis of a-Si:H/c-Si Hetero-junction Solar Sells Prepared by Low Temperature Processes)

  • 임충현;이정철;전상원;김상균;김석기;김동섭;양수미;강희복;이보영;송진수;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2005년도 춘계학술대회
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    • pp.196-200
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    • 2005
  • In this work, we investigated simple Aㅣ/TCO/a-Si:H(n)/c-Si(p)/Al hetero-junction solar cells prepared by low temperature processes, unlike conventional thermal diffused c-Si solar cells. a-Si:H/c-Si hetero-junction solar cells are processed by low temperature deposition of n-type hydrogenated amorphous silicon (a-Si:H) films by plasma-enhanced chemical vapor deposition on textured and flat p-type silicon substrate. A detailed investigation was carried out to acquire optimization and compatibility of amorphous layer, TCO (ZnO:Al) layer depositions by changing the plasma process parameters. As front TCO and back contact, ZnO:Al and AI were deposited by rf magnetron sputtering and e-beam evaporation, respectively. The photovoltaic conversion efficiency under AMI.5 and the quantum efficiency on $1cm^2$ sample have been reported. An efficiency of $12.5\%$ is achieved on hetero-structure solar cells based on p-type crystalline silicon.

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알루미늄 기판 상의 Ni layer가 a-Si의 AIC(Aluminum Induced Crystallization)에 미치는 영향 (Effects of Ni layer as a diffusion barrier on the aluminum-induced crystallization of the amorphous silicon on the aluminum substrate)

  • 윤원태;김영관
    • 한국결정성장학회지
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    • 제22권2호
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    • pp.65-72
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    • 2012
  • 본 연구에서는 비정질 실리콘의 알루미늄 유도 결정화(AIC)가 시도되었다. 결정질 실리콘의 좀 더 큰 입자를 얻기 위해, 선택적인 핵생성(Selective nucleation) 시도는 비정질 실리콘 밑의 실리카($SiO_2$) 층의 습식 파우더 분사 처리와 함께 진행됐다. 또한 니켈 층은 실리콘 원자가 알루미늄 층으로 이동하는 것을 방지하기 위한 확산 방지막(Diffusion barrier)으로 선택되었다. $520^{\circ}C$에서 열처리를 한 후에 XRD 분석을 통해 Si(111) 방향으로 결정화된 결정질 실리콘을 확인했고 니켈은 실리콘과 알루미늄 사이의 확산 방지막으로 매우 효과적인 재료라는 것을 입증하였다. 이 연구는 고성능의 태양전지에 적용하는 결정질 실리콘 막의 좀 더 큰 입자를 얻기 위한 방법 중의 하나라고 기대된다.