• Title/Summary/Keyword: Additional delay

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Design of a Multiplier for Irreducible Polynomial that all Coefficient over GF($3^m$) (GF($3^m$)상에서 모든 항의 계수가 존재하는 기약다항식의 승산기 설계)

  • 이광희;황종학;박승용;김흥수
    • Proceedings of the IEEK Conference
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    • 2002.06e
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    • pp.79-82
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    • 2002
  • In this paper, we proposed a multiplicative algorithm for two polynomials in existence coefficients over finite field GF(3$^{m}$ ). Using the proposed multiplicative algorithm, we constructed the multiplier of modular architecture with parallel in-output. The proposed multiplier is composed of (m+1)$^2$identical cells, each cell consists of single mod(3) additional gate and single mod(3) multiplicative gate. Proposed multiplier need single mod(3) multiplicative gate delay time and m mod(3) additional gate delay time not clock. Also, the proposed architecture is simple, regular and has the property of modularity, therefore well-suited for VLSI implementation.

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AN M/G/1 QUEUE WITH GENERALIZED VACATIONS AND EXHAUSTIVE SERVICE

  • Lim, Jong-Seul;Lee, Sang-Heon
    • Journal of applied mathematics & informatics
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    • v.6 no.1
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    • pp.309-320
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    • 1999
  • Models of single-server queues with vacations have been widely used to study the performance of many computer communi-cation and production systems. In this paper we analyze an M/G/1 queue with generalized vacations and exhaustive service. This sys-tem has been shown to possess a stochastic decomposition property. That is the customer waiting time in this system is distributed as the sum of the waiting time in a regular M/G/1 queue with no va-cations and the additional delay due to vacations. Herein a general formula for the additional delay is derived for a wide class of vacation policies. The formula is also extended to cases with multiple types of vacations. Using these new formulas existing results for certain vacation models are easily re-derived and unified.

Fault Coverage Metric for Delay Fault Testing (지연 고장 테스팅에 대한 고장 검출율 메트릭)

  • Kim, Myeong-Gyun;Gang, Seong-Ho;Han, Chang-Ho;Min, Hyeong-Bok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.4
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    • pp.266-276
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    • 2001
  • Due to the rapid development of semiconductor technology, the complexity of VLSI circuits has heavily increased. With the increased densities of integrated circuits, several different types of faults can occur Thus, testing such circuits is becoming a sever problem. Delay testing can detect system timing failures caused by delay faults. However, the conventional delay fault coverage in terms of the number of detected faults may not be an effective measure of delay testing because, unlike a stuck-at-faults, the impact of a delay fault is dependent on its delay defect size rather than on its existence. Thus, the effectiveness of delay testing is dependent on the propagation delay of the path to be tested, the delay defect size, and the system clock interval. This paper proposes a new delay defect fault coverage that considers both propagation delay of the path to be tested and additional delay defect size. And the relationship between delay defect fault coverage and defect level is analyzed.

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Towards Achieving the Maximum Capacity in Large Mobile Wireless Networks under Delay Constraints

  • Lin, Xiaojun;Shroff, Ness B.
    • Journal of Communications and Networks
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    • v.6 no.4
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    • pp.352-361
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    • 2004
  • In this paper, we study how to achieve the maximum capacity under delay constraints for large mobile wireless networks. We develop a systematic methodology for studying this problem in the asymptotic region when the number of nodes n in the network is large. We first identify a number of key parameters for a large class of scheduling schemes, and investigate the inherent tradeoffs among the capacity, the delay, and these scheduling parameters. Based on these inherent tradeoffs, we are able to compute the upper bound on the maximum per-node capacity of a large mobile wireless network under given delay constraints. Further, in the process of proving the upper bound, we are able to identify the optimal values of the key scheduling parameters. Knowing these optimal values, we can then develop scheduling schemes that achieve the upper bound up to some logarithmic factor, which suggests that our upper bound is fairly tight. We have applied this methodology to both the i.i.d. mobility model and the random way-point mobility model. In both cases, our methodology allows us to develop new scheduling schemes that can achieve larger capacity than previous proposals under the same delay constraints. In particular, for the i.i.d. mobility model, our scheme can achieve (n-1/3/log3/2 n) per-node capacity with constant delay. This demonstrates that, under the i.i.d. mobility model, mobility increases the capacity even with constant delays. Our methodology can also be extended to incorporate additional scheduling constraints.

Improving the Reception Performance of Legacy T-DMB/DAB Receivers in a Single-Frequency Network with Delay Diversity

  • Baek, Myung-Sun;Lee, Yong-Hoon;Hur, Namho;Kim, Kyung-Seok;Lee, Yong-Tae
    • ETRI Journal
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    • v.36 no.2
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    • pp.188-196
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    • 2014
  • This paper describes a simple delay diversity technique for terrestrial digital multimedia broadcasting (T-DMB) and digital audio broadcasting in a single-frequency network (SFN). For the diversity technique, a delay diversity scheme is adopted. In the delay diversity scheme, a non-delayed signal is transmitted in the first antenna, and delayed versions of the signal are transmitted in each additional antenna. For an SFN environment with multiple transmitters, delay diversity can be executed by controlling the emission times of the transmitters. This SFN delay diversity scheme does not require any hardware changes in either the transmitter or receiver, and perfect backward compatibility can be acquired. To evaluate the performance improvement, laboratory tests are executed with various types of commercial T-DMB receivers as well as a measurement receiver. The improvement in the bit error rate performance is evaluated using a measurement receiver, and an improvement of the threshold of visibility value is evaluated for commercial receivers. Test results show that the T-DMB system can obtain diversity gain using the described technique.

The Effects of Clothing Benefits on Delay of Decision Making and Shopping Information in Internet Shopping (의복추구혜택에 따른 인터넷 구매결정 연기와 쇼핑정보이용에 관한 연구)

  • Kim, Han-Na
    • Journal of the Korean Society of Clothing and Textiles
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    • v.32 no.5
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    • pp.766-776
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    • 2008
  • The purpose of this study was 1) to identify the reasons for delay of decision making and the shopping information in internet shopping, 2) to classify consumers based on the clothing benefits, 3) and to examine the differences among consumer groups in the reasons for delay of decision making and the shopping information. The data were collected from a sample of 500 internet shopper aged from 20 to 40. This study used factor analysis, multiple regression analysis, Pearson's correlation analysis, cluster analysis and ANOVA. The results showed that the reasons for delay of decision making consisted of eight factors: Performance risk, Comparison shopping, Economic shopping, Social risk, Uncertainty, Expecting of market change, Product unsatisfaction, Passive shopping. The shopping information consisted of three factors: Product variety, Product information, Additional information. Five factors of clothing benefits were Economy, Figure compensation, Social position, Individuality, and Comfort. The respondents were classified into four groups by five factors of clothing benefits; Individuality seeking group, Low-benefits seeking group, Economy seeking group, Figure compensation/comfort seeking group. There were significant differences among groups in the reasons for delay of decision making and the shopping information among groups. Therefore, marketers need to provide different shopping information for delay closure by target groups.

A Study on Design Additional Fee Estimation by Change Order - Focused on Design Stage - (설계변경에 따른 설계추가용역비 산정에 관한 연구 - 설계단계 중심으로 -)

  • Park, Won-Ho;Paek, Joon-Hong
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2009.05b
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    • pp.155-158
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    • 2009
  • During the construction project period, a lot of change orders happen in the design and construction stage Especially, The change order during construction stage causes the huge construction cost increase and duration delay. Accordingly, research on the change order of the construction stage is being progressed relatively active in the design stage, but the design changes are rarely made. In the design stage, the owner has to pay a design addition cost when change order due to the demands of owner happens. However Korea has not the specific standard about design additional cost in design stage. Therefore, this study analyzes problems of design additional cost estimation methods through the case study, and then indicates the method that the ratio distributes to details dividing design tasks and the method of the PM(Project Management). Eventually, this study expects to minimize claim related the design additional cost in design stage.

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Improved Delay-Locked Loop in a UWB Impulse Radio Time-Hopping Spread-Spectrum System

  • Zhang, Weihua;Shen, Hanbing;Kwak, Kyung-Sup
    • ETRI Journal
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    • v.29 no.6
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    • pp.716-724
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    • 2007
  • As ultra-wideband impulse radio (UWB-IR) uses short-duration impulse signals of nanoseconds, even a small number of timing errors can cause a detrimental effect on system performance. A delay-locked loop (DLL) is proposed to synchronize and reduce timing errors. The design of the DLL is vital for UWB systems. In this paper, an improved DLL is introduced to a UWB-IR time-hopping spread-spectrum system. Instead of using only two central correlator branches as in a conventional DLL, the proposed system uses two additional correlator branches with different delay parameters and different weight parameters. The performance of the proposed schemes with the optimal parameters is compared with that of traditional schemes through simulation: the proposed four-branch DLLs achieves less tracking jitter or a longer mean time to lose lock (MTLL) than the conventional two-branch DLLs if proper parameters are chosen.

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Observer Design for Discrete-Time Nonlinear Systems with Output Delay (출력지연을 갖는 이산시간 비선형 시스템의 관측기 설계)

  • Lee, Sung-Ryul
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.49 no.3
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    • pp.26-30
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    • 2012
  • This paper presents the observer design method for discrete-time nonlinear systems with delayed output. It is shown that by considering a nonlinear term of error dynamics as an additional state variable, the discrete-time nonlinear error dynamics with time delay can be transformed into the discrete-time linear one with time delay. Sufficient conditions for existence of state observer are characterized by linear matrix inequalities. Finally, an illustrative example is given in order to show the effectiveness of our design method.

Negative Group Delay Circuit with Improved Signal Attenuation and Multiple Pole Characteristics

  • Chaudhary, Girdhari;Jeong, Junhyung;Kim, Phirun;Jeong, Yongchae
    • Journal of electromagnetic engineering and science
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    • v.15 no.2
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    • pp.76-81
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    • 2015
  • This paper presents a design of a transmission line negative group delay (NGD) circuit with multiple pole characteristics. By inserting an additional transmission line into a conventional NGD circuit, the proposed circuit provides further design parameters to obtain wideband group delay (GD) and to help reduce signal attenuation. As a result, the number of gain compensating amplifiers can be reduced, which can contribute to stable operation when integrated into RF systems. The multiple pole characteristics can provide wider NGD bandwidth and can be obtained by connecting resonators with slightly different center frequencies separated by quarter-wavelength transmission lines. For experimental validation, an NGD circuit with two poles GD characteristic is designed, simulated, and measured.