• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제52권3호
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• pp.133-139
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• 2003

In this paper, a new control scheme of Class-E inverter for Induction Heating (IH) Jar applications with clamped voltage characteristics using Pulse-Frequency-Modulation (PFM) is introduced. To reduce the voltage stress of switch, the proposed PFM control scheme doesn't need any auxiliary circuit in comparison to a family of Active Clamped Class-E (ACCE) inverter. It can decrease voltage stress of switch through modulation of switching frequency. The Class-E inverter using the proposed control scheme has the advantage of not only the same output power when it is compared with a Hybrid-Active Clamped Class-E (Hybrid-ACCE) inverter but also Zero-Voltage-Switching (ZVS), which are characteristics of conventional Class-E and ACCE inverter. The control principles and analysis of proposed method are explained in detail and its validity is verified through simulation and experimental results.

• Journal of Power Electronics
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• 제2권2호
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• pp.104-111
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• 2002

This paper presents a new hybrid control scheme using Active-Clamped Class-E(ACCE) inverter for the Induction Heating (IH) jar. The proposed hybrid control scheme has characteristics, which acts as class-E inverter at lower switch voltage and ACCE inverter at higher switch voltage than reference voltage of the main switch by feeding back voltage of the switch. The proposedv hybrid control scheme also has advantage of conventional ACCE inverter such as Zero-Voltage-Switch(ZVS) of the main switch and the reduced switch voltage due to clamping cricuit. Moreover, the proposed hybrid control method using ACCE inverter has higher output power than convenional control scheme since ACCE inverter operates like class-E inverter at low input voltage condition. The principles of the proposed control are explained in detail and the validity of the proposed control scheme is verifed through the several interesting simulated and experimental results.

• Journal of Power Electronics
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• 제17권3호
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• pp.653-663
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• 2017

Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.68-73
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• 1998

This paper presents a novel prototype of active voltage clamped quasi-resonant ZVS-PWM forward DC-DC converter designed for specific low voltage high current application. We establish the soft-switching forward converter with a high frequency isolated link which can efficient operate over wide load ranges under conditions of zero voltage soft-switching and active voltage clamped switching. In addition, we evaluate connection of the soft-switching forward converter with large capacitor which capacitance is over 100[F].

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.1009-1011
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• 2001

This paper presents a new hybrid control scheme using Active-Clamped Class-E (ACCE) inverter of induction heating(IH) jar for high power applications. The proposed hybrid control scheme has characteristics, which act as class-E inverter at lower switch voltage and ACCE inverter at higher switch voltage than reference voltage of the main switch by feeding back voltage one as well as advantages of conventional ACCE inverter such as zero-voltage switching(ZVS) of the main switch and the reduced switch voltage due to the clamping circuit. Moreover, the proposed control method makes higher output power than conventional ACCE inverter control one since ACCE inverter is operated like class-E inverter at low voltage condition. The principle of the proposed control are explained in detail and the validity of the proposed control scheme is verified through the several interesting simulated and experimental results.

• Journal of Power Electronics
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• 제18권3호
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• pp.662-671
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• 2018

This paper presents a new structure for a step up dc-dc converter, which has several advantageous features. Firstly, the input dc source and the clamped capacitor are connected in series to transfer energy to the load through dual voltage multiplier cells. Therefore, the proposed converter can produce a very high voltage and a high conversion efficiency. Secondly, a double voltage clamped circuit is introduced to the primary side of the coupled inductor. The energy of the leakage inductance of the coupled inductor is recycled and the inrush current problem of the clamped circuits can be shared equally by two synchronous clamped capacitors. Therefore, the voltage spike of the switch tube is solved and the current stress of the diode is reduced. Thirdly, dual voltage multiplier cells can absorb the leakage inductance energy of the secondary side of the coupled inductor to obtain a higher efficiency. Fourthly, the active switch turns on at almost zero current and the reverse-recovery problem of the diodes is alleviated due to the leakage inductance, which further improves the conversion efficiency. The operating principles and a steady-state analysis of the continuous, discontinuous and boundary conduction modes are discussed in detail. Finally, the validity of this topology is confirmed by experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.236-241
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• 2001

This paper presents a novel prototype of active voltage-clamping capacitor-assisted edge resonant soft switching PWM inverter operating at a constant frequency variable power (VPCF) regulation scheme, which is suitable for consumer high-power induction-heating cooking appliances. New generation IGBT with a trench gate is particularly improved in order to reduce conduction loss due to its lowered saturation voltage characteristics. The soft switching load resonant and quasi-resonant inverter designed distinctively using the latest IGBTs is evaluated from an experimental point of view.

• Journal of Power Electronics
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• 제18권4호
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• pp.955-964
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• 2018

In this paper, an active capacitor-diode-switch (CDS) snubber is proposed for L-type current-fed isolated DC-DC converters. The proposed CDS-clamped converter has a number of advantages. It can achieve wide range zero-voltage switching (ZVS) on two switches, a continuous input current with a low ripple, a reduction of one active switch and high efficiency. The operating principles, analysis and parameter design guideline are presented. A 300 W prototype is built to test the proposed converter. Simulation and experimental results are shown at 30 V input voltage and 400 V output voltage.

• Journal of Power Electronics
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• 제17권4호
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• pp.923-932
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• 2017

This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

• Journal of Power Electronics
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• 제15권2호
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• pp.504-517
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• 2015

This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.