• 전력전자학회논문지
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• 제18권4호
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• pp.397-402
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• 2013

This paper proposes a new passive type LED driver which satisfies the standard of power factor (PF) and total harmonic distortion (THD). The proposed passive LED driver also has high-efficiency and long-life time characteristics compared to active LED driver which is composed of op-amp, switches and so on. By using just passive components such as inductor, capacitor, and diode, it has resolved extremely short-life time and low-efficiency problems of previous LED drivers. It has achieved PF of 0.99, THD of 16.4 %, and the total efficiency of 95 %. The proposed passive LED driver is fully analyzed and verified by simulations and experiments, which results are in good agreement each other.

• 전력전자학회논문지
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• 제9권3호
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• pp.285-293
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• 2004

본 논문에서는 능동역률보상(PFC)의 구조를 가진 SEPIC 컨버터를 이용한 무전극 형광램프(electrodeless fluorescent lamps)용 전자식 안정기를 제안하였다. SEPIC 컨버터는 입력 전류의 낮은 고조파와 고역률의 특성을 가진다. 제안된 제어방법으로는 UC3854의 적분회로를 이용한 것으로 이 기술은 전류연속모드로 동작하는 역률보상 및 과전류보호를 제공하는 매우 간단한 제어 회로이다. 제안된 무전극 형광램프용 전자식 안정기는 3개의 무전극 형광램프용으로 설계되어 기존의 무전극 형광램프용 전자식 안정기보다 에너지 및 제작비 절약 효과가 크다. 제안된 안정기의 특성을 측정하기 위해 실험을 실시하였으며 이를 통해 고역률과 낮은 THD를 확인하였다.

• Journal of Power Electronics
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• 제18권4호
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• pp.965-974
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• 2018

A new zero-voltage-switching (ZVS) push-pull pulse-width modulation (PWM) converter is proposed in this paper. The wide ZVS condition for all of the switches is obtained by utilizing the energy stored in the output inductor and magnetizing inductance. As a result, the switching losses can be dramatically reduced. A simple auxiliary circuit including two small diodes and one capacitor is added at the secondary side of a high frequency (HF) transformer to reset the primary current during the circulating stage and to clamp the voltage spike across the rectifier diodes, which enables the use of low-voltage and low-cost diodes to reduce the conducting and reverse recovery losses. In addition, there are no active devices or resistors in the auxiliary circuit, which can be realized easily. A detailed steady operation analysis, characteristics, design considerations, experimental results and a loss breakdown are presented for the proposed converter. A 500 W prototype has been constructed to verify the effectiveness of the proposed concept.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권1호
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• pp.28-35
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• 2007

This paper presents a high-speed flash analog-to-digital converter (ADC) for ultra wide band (UWB) receivers. In this flash ADC, the interpolating technique is adopted to reduce the number of the amplifiers and a linear and wide-bandwidth interpolating amplifier is presented. For this ADC, the transistor size for the cascaded stages is inversely scaled to improve the trade-off in bandwidth and power consumption. The active inductor peaking technique is also employed in the pre-amplifiers of comparators and the track-and-hold circuit to enhance the bandwidth. Furthermore, a digital-to-analog converter (DAC) is embedded for the sake of measurements. This chip has been fabricated in $0.13{\mu}m$ 1P8M CMOS process and the total power consumption is 113mW with 1V supply voltage. The ADC achieves 4-bit effective number of bits (ENOB) for input signal of 200MHz at 5-GSample/sec.

• 대한전자공학회논문지
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• 제9권3호
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• pp.9-16
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• 1972

본논문은 "s"를 변환함수로 하는 GIC회로가 자이레이터와 마찬가지로 인덕터를 RC능동회로로서 실헐할 수 있고, 또 임의의 안정한 전달함수가 GIC를 포함한 2단자대회로의 open-circuit voltage ratio로서 실현될 수 있음을 밝힌 것이다. 트랜지스터를 사용하여 GIC회로를 구성함에 있어시 트랜지스터의 nullator-norator model이 적어도 10kHz 이하의 주파수 범위에서 훌륭하게 적용될 수 있음이 밝혀졌다. GIC를 사용한 회로합성법의 특징은 다음괴 같다. 첫째로, 임의의 안정한 전달함수는 대단히 단순한 회로구성을 되풀이함으로서 체계계적으로 또 기계적으로 실현될 수 있다. 둘째로, 전체 회로에 있어서 GIC를 제외한 모든 회로요소는 저항뿐이다. 셋째로 n차의 전달함수를 실현하는데 있어서 필요한 콘덴서의 수효는 n이며, 이것은 가능한 가장 적은 수효라고 믿어진다.

• 한국산업정보학회논문지
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• 제21권4호
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• pp.21-30
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• 2016

In a single-phase power factor correction (PFC), the standard cascaded control algorithm using a proportional-integral-derivative (PID) controller has two main drawbacks: an inability to track sinusoidal current reference and low harmonic compensation capability. These drawbacks cause poor power factor and high harmonics in grid current. To improve these drawbacks, this paper uses a proportional-integral-derivative-resonant (PIDR) controller which combines a type-III PID with proportional-resonant (PR) controllers in the PFC. Based on a small signal model of the PFC, the type-III PID controller was implemented taking into account the bandwidth and phase margin of the PFC system. To adopt the PR controllers, the spectrum of inductor current of the PFC was analyzed in frequency domain. The hybrid PIDR controller were simulated using PSCAD/EMTDC and implemented on a 3 kW PFC prototype hardware. The performance results of the hybrid PIDR controller were compared with those of an individual type-III PID controller. Both controllers were implemented successfully in the single-phase PFC. The total harmonic distortion of the proposed controller were much better than those of the individual type-III PID controller.

• 전기전자학회논문지
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• 제20권3호
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• pp.314-317
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• 2016

최근 휴대용 기기의 수요가 증가함에 따라 배터리 사용시간을 최대화하기 위한 노력이 진행되고 있다. 본 논문에서는 빠른 과도 응답을 갖는 멀티페이스 벅 변환기를 제안한다. 멀티페이스 벅 변환기는 리플 상쇄 효과가 있기 때문에 작은 크기의 출력 캐패시터를 사용할 수 있고, 더 적은 인덕턴스를 갖는 인덕터의 사용이 가능하다. 휴대용 기기가 대기 모드에서 활성 모드로 빠르게 변할 수 있도록 4-페이스 구조로 설계하여 빠른 과도 응답을 갖게 하였다. 사용된 공정은 Hynix 0.18um CMOS 공정을 통해 제작되었고 공급전압 범위는 2.7~3.3V 이며, 최대 부하 전류는 500mA, settling time은 14us이다.

• Journal of Power Electronics
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• 제7권3호
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• pp.246-256
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• 2007

In this paper, a novel type auxiliary active edge resonant snubber assisted zero current soft switching pulse modulation Single-Ended Push Pull (SEPP) series load resonant inverter using IGBT power modules is proposed for cost effective consumer high-frequency induction heating (IH) appliances. Its operating principle in steady state is described by using each switching mode's equivalent operating circuits. The new multi resonant high-frequency inverter with series load resonance and edge resonance can regulate its high frequency output power under a condition of a constant frequency zero current soft switching (ZCS) commutation principle on the basis of the asymmetrical pulse width modulation (PWM) control scheme. Brand-new consumer IH products using the proposed ZCS-PWM series load resonant SEPP high-frequency inverter using IGBTs is evaluated and discussed as compared with conventional high-frequency inverters on the basis of experimental results. In order to extend ZCS operation ranges under a low power setting PWM as well as to improve efficiency, the high frequency pulse density modulation (PDM) strategy is demonstrated for high frequency multi-resonant inverters. Its practical effectiveness is substantially proved from an application point of view.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.372-373
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• 2019

본 논문은 다중 권선 결합 인덕터를 이용한 능동 셀 밸런싱 회로의 밸런싱 속도를 향상시킬 수 있는 새로운 동작 모드를 제안한다. 다중 권선 결합 인덕터를 사용한 능동 셀 밸런싱 회로는 두 셀이 하나의 결합 인덕터 권선을 공유하며, 셀과 결합 인덕터 사이의 연결을 제어하기 위해 셀당 하나의 스위치가 사용된다. 이 회로는 비교적 높은 전압을 갖는 소스 셀에 저장된 에너지를 결합 인덕터에 저장한 뒤, 그 에너지를 목표 셀로 전달하는 방식으로 셀 밸런싱을 수행한다. 하지만, 회로 구조상서로 다른 권선을 공유하고, 동일한 위치에 연결된 셀 간 밸런싱을 수행할 경우, 두 번의 에너지 전달 과정을 통해 목표 셀로 에너지가 전달 되게 된다. 이는 에너지 전달 경로를 증가시키므로 회로의 효율과 셀 밸런싱 속도를 크게 저하시킨다. 본 논문은 위의 셀 조건에서 에너지 전달 경로를 단축시켜 셀 밸런싱 속도를 향상시킬 수 있는 새로운 동작 모드를 제안한다. 새로운 동작 모드 성능은 15W급 시작품을 이용하여 검증되었다.

• Journal of Power Electronics
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• 제19권2호
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• pp.363-379
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• 2019

Resonant converters have attracted a lot of attention because of their high efficiency due to the soft-switching performance. An isolated high step-up converter with secondary-side resonant loops is proposed and analyzed in this paper. By placing the resonant loops on the secondary side, the current stress for the resonant capacitors is greatly reduced. The power loss caused by the equivalent series resistance of the resonant capacitor is also decreased. Clamp diodes in parallel with the resonant capacitors ensure a unique discontinuous current mode in the converter. Under this mode, the active switches can realize soft-switching during both turn-on and turn-off transitions. Meanwhile, the reverse-recovery problems of diodes are also alleviated by the leakage inductor. The converter is essentially a step-up converter. Therefore, it is helpful for decreasing the transformer turn-ratio when it is applied as a high step-up converter. The steady-state operation principle is analyzed in detail and design considerations are presented in this paper. Theoretical conclusions are verified by experimental results obtained from a 500W prototype with a 35V-42V input and a 400V output.