• Title/Summary/Keyword: Accurate circuit

Search Result 434, Processing Time 0.029 seconds

The Equivalent Circuit, The Graphically Calculating Method Of The Characteristics, And The Calculating Method By Determination Of Equivalent Circuit Parameters In Single Phase Induction Motor (단순상유도전동기의 등가회로와 도식적 특성산정법 및 정수결정에 의한 특성산정법)

  • Keung Yul Oh
    • 전기의세계
    • /
    • v.22 no.1
    • /
    • pp.42-51
    • /
    • 1973
  • The contriving equivalent circuit of single phase induction motor which does not separate the primary leakage reactance and the secondary leakage reactance by the revolving field theory, and the graphically calculating method of the characteristics with T-type circle diagram of three phase induction motor which does not suppose the primary leakage reactance can be drawn up only by the no load test, the lock test, and measuring the resistance of stator winding are suggested in this paper. The method which can calculate the parameters of the equivalent circuit and the characteristics with no load test, lock test and measuring resistance of stator windings is suggested in this paper. Considered the exciting current in lock test, we could calculate very accurate characteristics of the single phase induction motor.

  • PDF

Delay test for combinational and sequential circuit on IEEE 1149.1 (조합회로와 순서회로를 위한 경계면 스캔 구조에서의 지연시험)

  • 이창희;윤태진;안광선
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.35C no.2
    • /
    • pp.10-21
    • /
    • 1998
  • In this paper, we analyze the problems of conventional and previous mehtod on delay test method in IEEE 1149.1. To solve them, we propose two kinds of delay test architectures. One is called ARCH-C, is for combinatonal circuit, and the other is ARCH-S, for clocked sequential circuit. ARCH-C is able to detect delay defect of 0.5 $T_{tck}$ or 1 $T_{tck}$ size. And ARCH-C have a fixed and small amount of hardware overhead, on the contrary preious method has a hardware overhead on the dependent of CUT. This paper discusses weveral problems of Delay test on IEEE 1149.1 for clocked sequential circuit. We suggest the method called ARCH-S, is based on a clock counting technique to generate continuous clocked input of CUT. the simulation results ascertain the accurate operation and effectiveness of the proposed architectures.res.

  • PDF

Circuit-Level Reliability Simulation and Its Applications (회로 레벨의 신뢰성 시뮬레이션 및 그 응용)

  • 천병식;최창훈;김경호
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.31A no.1
    • /
    • pp.93-102
    • /
    • 1994
  • This paper, presents SECRET(SEC REliability Tool), which predicts reliability problems related to the hot-carrier and electromigration effects on the submicron MOSFETs and interconnections. To simulate DC and AC lifetime for hot-carrier damaged devices, we have developed an accurate substrate current model with the geometric sensitivity, which has been verified over the wide ranges of transistor geometries. A guideline can be provided to design hot-carrier resistant circuits by the analysis of HOREL(HOT-carrier RFsistant Logic) effect, and circuit degradation with respect to physical parameter degradation such as the threshold voltage and the mobility can also be expected. In SECRET, DC and AC MTTF values of metal lines are calculated based on lossy transmission line analysis, and parasitic resistances, inductances and capacitances of metal lines are accurately considered when they operate in the condition of high speed. Also, circuit-level reliability simulation can be applied to the determination of metal line width and-that of optimal capacitor size in substrate bias generation circuit. Experimental results obtained from the several real circuits show that SECERT is very useful to estimate and analyze reliability problems.

  • PDF

Static and Dynamic Testing Technique of Inductor Short Turn

  • Piyarat, W.;Tipsuwanporn, V.;Tarasantisuk, C.;Kummool, S.;Im, T.Sum
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 1999.10a
    • /
    • pp.281-283
    • /
    • 1999
  • This topic presents an inductor short turn testing. From the rudimentary principles, the quality factor(Q) decreases due to inductor short turn. Frequency response varies because of the variation of circuit inductance and resistance. In general, short turn circuit testing is performed by comparing the ratio of an inductance and resistance of inductor in that particular circuit. An alternative method can be done by considering the response of second order circuit which can give both dynamic and static testing, whereas static testing give an error results not more than 2 turns. For dynamic testing, the result is more accurate, which can test fur the short turn number form 1 turn onward.

  • PDF

Investigation of buckling behavior of functionally graded piezoelectric (FGP) rectangular plates under open and closed circuit conditions

  • Ghasemabadian, M.A.;Kadkhodayan, M.
    • Structural Engineering and Mechanics
    • /
    • v.60 no.2
    • /
    • pp.271-299
    • /
    • 2016
  • In this article, based on the higher-order shear deformation plate theory, buckling analysis of a rectangular plate made of functionally graded piezoelectric materials and its effective parameters are investigated. Assuming the transverse distribution of electric potential to be a combination of a parabolic and a linear function of thickness coordinate, the equilibrium equations for the buckling analysis of an FGP rectangular plate are established. In addition to the Maxwell equation, all boundary conditions including the conditions on the top and bottom surfaces of the plate for closed and open circuited are satisfied. Considering double sine solution (Navier solution) for displacement field and electric potential, an analytical solution is obtained for full simply supported boundary conditions. The accurate buckling load of FGP plate is presented for both open and closed circuit conditions. It is found that the critical buckling load for open circuit is more than that of closed circuit in all loading conditions. Furthermore, it is observed that the influence of dielectric constants on the critical buckling load is more than those of others.

A Distance Relaying Algorithms Immune to Reactance Effect for Double-Circuit Transmission Line Systems (리액턴스 효과를 최소한 병행 2회선 송전선로 보호 거리계전 알고리즘)

  • 안용진;강상희;이승재
    • The Transactions of the Korean Institute of Electrical Engineers A
    • /
    • v.50 no.1
    • /
    • pp.38-44
    • /
    • 2001
  • For double-circuit transmission line systems, an accurate digital distance relaying algorithm immune to the reactance effect is proposed. The apparent impedance calculated by the distance relay is influenced by the combined reactance effect of the fault resistance and the load current as well as the mutual coupling effect caused by the zero-sequence current of the adjacent parallel circuit. To compensate the magnitude and phase of the estimated impedance, this algorithm uses phase angle difference between the zero(positive) sequence of the both side of the system seperated by the fault point. The impedance measuring algorithm presented used a current distribution factor to compensate mutual coupling effect instead of the collected zero-sequence current of the adjacent parallel circuit.

  • PDF

Practical Photovoltaic Simulator with a Cross Tackling Control Strategy Based on the First-hand Duty Cycle Processing

  • Wang, Shuren;Jiang, Wei;Lin, Zhengyu
    • Journal of Power Electronics
    • /
    • v.15 no.4
    • /
    • pp.1018-1025
    • /
    • 2015
  • This paper proposes a methodological scheme for the photovoltaic (PV) simulator design. With the advantages of a digital controller system, linear interpolation is proposed for precise fitting with higher computational efficiency. A novel control strategy that directly tackles two different duty cycles is proposed and implemented to achieve a full-range operation including short circuit (SC) and open circuit (OC) conditions. Systematic design procedures for both hardware and algorithm are explained, and a prototype is built. Experimental results confirm an accurate steady state performance under different load conditions, including SC and OC. This low power apparatus can be adopted for PV education and research with a limited budget.

Development of the CFD Program for the Cold Gas Flow Analysis in a High Voltage Circuit Breaker Using the CFD-CAD Integration (CFD-CAD 통합해석을 위한 초고압 차단기 내부의 냉가스 유동해석 프로그램 개발)

  • Lee, J.C.;Oh, I.S.
    • Proceedings of the KIEE Conference
    • /
    • 2001.10a
    • /
    • pp.30-32
    • /
    • 2001
  • There are many difficult problems in analyzing the flow characteristics in a high voltage circuit breaker such as shock wave and complex geometries, which may be either static or in relative motion. Although a variety of mesh generation techniques are now available, the generation of meshes around complicated, multi-component geometries like a gas circuit breaker is still a tedious and difficult task for the computational fluid dynamics. This paper presents the CFD program for analyzing the compressible flow fields in a high voltage gas circuit breaker using the Cartesian cut-cell method based on the CFD-CAD integration, which can achieve the accurate representation of the geometry designed by a CAD tools. This technique is frequently satisfied, and it will be almost universally so in the future, as the CFD-CAD traffic increase.

  • PDF

Nonlinear Magnetic Modeling of EI Core Inductor by PLECS Simulation

  • Wang, Zhuning;Sul, Seung-Ki
    • Proceedings of the KIPE Conference
    • /
    • 2015.11a
    • /
    • pp.9-10
    • /
    • 2015
  • EI core inductor in power electronic circuit simulation is usually assumed as linear by using matrix model. However, nonlinear magnetic characteristics such as B-H characteristic are also important for the accurate simulation of the circuit behavior. To model nonlinear magnetic characteristics of EI core inductor with only DC bias table, this paper presents a method in PLECS simulation tool which is a commercially available simulation tool for power electronics circuit analysis. Comparing with ideal matrix model, the simplification and accuracy are improved by this modeling method. Also, compared to analysis by FEM, it is much simpler, faster and easier to simulate with power electronics circuit. Validation of the proposed model was verified by simulation and experiment results.

  • PDF

The analysis of equivalent circuit with. gas concentration of MWCNT gas sensor using by FEM (FEM을 이용환 MWCNT 가스센서의 가스농도에 따른 등가회로 해석)

  • Jang, In-Bum;Jang, Kyung-Uk
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2010.06a
    • /
    • pp.252-252
    • /
    • 2010
  • Carbon nanotubes(CNTs) have excellent electrical, mechanical and chemical properties. In this paper, the variation of charge density and resistivity in MWCNT gas sensor were defined by three Dimensional Finite element method, and an accurate description of equivalent circuit of MWCNT gas sensor was investigated.

  • PDF