• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.990-994
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• 2003

This paper describes the VoIP(Voice over Internet Protocol) SoC(System on Chip) Design and the test board development for the function verification to support voice communication services using Internet. To implement the simple system of configuration, we designed the VoIP SoC which have ARM922T of 32bit microprocessor, IP network interface, voice signal interface, various user interface function. Also we developed test program and communication protocol to verify the function of this chip. We used several tools of design and simulation, developed and tested a test board with Excalibur which includes ARM922T microprocessor and FPGA.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.11b
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• pp.1281-1284
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• 2002

본 논문은 인터넷을 이용한 음성통신 서비스를 제공하기 위해 사용되는 VoIP 시스템 칩 설계 및 기능 검증을 위한 보드 개발에 관한 것이다. 구성이 간단한 시스템을 구현하기 위하여 32 비트 RISC 프로세서인 ARM922T 프로세서 코어를 중심으로 IP 망 접속 기능, 톤 발생 및 음성신호 접속기능과 다양한 사용자 정합 기능을 가지는 VoIP 시스템 칩을 설계하고, 이 칩의 기능을 검증하기 위하여 시험 프로그램 및 통신 프로토콜을 개발하였으며, 각종 설계 및 시뮬레이션 툴을 사용하고 ARM922T와 FPGA가 결합된 Excalibur를 사용한 시험용 보드를 개발하여 시험하였다.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.411-413
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• 2003

본 논문에서는 ARM922T Core와 주변장치를 설계할 수 있는 100만 게이트의 FPGA를 내장한 알데라(Altera)사의 엑스칼리버(Excalibur)를 이용하여 DC모터 제어용 SoC를 설계하였다. SoC란 System on Chip의 약자로 하나의 칩 안에 프로세서와 다양한 목적의 주변장치들을 집적하는 것을 말한다. 모터를 구동하기 위한 PWM신호 생성기를 하드웨어 설계언어(Hardware Description Language)로 구현하고 시뮬레이션을 통해 설계모듈을 검증하였다. 이렇게 검증한 PWM 생성기 모듈과 ARM922T Core를 합성하여 SoC를 설계하였다. PWM 생성기 모들을 구성하는 내부의 각 분분을 VerilogHDL로 코딩하여 심볼로 만들어 통합하는 방식으로 설계를 하였으며 실제 모터를 구동하기 위해서 프로세서가 동작할 수 있도록 C언어로 프로그램하여 함께 칩에 다운로드하여 테스트를 하였다. SoC를 기반으로한 시스템 설계의 장점은 시스템이 간단해지고 고속의 동작이 가능하며 회로의 검증 및 다양한 시뮬레이션이 용이하다는데 있다.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.59-62
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• 2003

The purpose of this paper is to present how to implement Segment_LCD display using SoC design. The SoC design is achieved by using an ARM_based Excalibur device. The Excalibur device offers an outstanding embedded development platform with ARM922T and FPA. The design in the Excailbur device uses the embedded AR띤 Processor core and the AMBA high-performance bus (AHH) to write to a memory-mapped slave peripheral in the FPGA portion of the device. Here, Segment_LCD is one kind of memory-mapped slave peripherals. In order to Implement the Segment_LCD display based on SoC design, four steps are fellowed. At first, IP modules are made by using Verilog HDL. Secondly, the ARM processor of the Excalibur is programmed using C in ADS (ARM Developer Suite). And in the third step, the whole system is simulated and verified. At last, modules are downloaded to SoCMaster kit. Both Quartus II software and ModelSim5.5e software are the key software tools during the design.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.6B
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• pp.325-333
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• 2007

An OS requires the device driver to control hardware IPs at application level. Development of a device driver requires specific acknowledge for target hardware and OS. In this paper, we present a system which generates a device driver together with an interface circuit. In the proposed system, an efficient device driver is generated by selecting a basic device driver skeleton, a function module code, and a header file table from the pre-constructed library and an interface circuit is constructed such that the generated device driver operates correctly. The proposed system is evaluated by generating a TFT-LCD device driver on the ARM922T core with 3.5 inch Samsung TFT-LCD in ARM-Linux environment. Experiment result shows that the writing time on the LCD is decreased by 1.12% and the compiled code size is increased by 0.17% compared to the manually generated one. The automatically generated device driver has no performance degradation in the latency of hardware control at the application program level. The system development time can be reduced using the proposed device driver generation system.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.703-706
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• 2005

본 논문에서는 스테레오 비전 알고리즘을 ARM9 프로세서를 사용하는 SoC의 IP 개념으로 구현하였다. 구현하고자 하는 스테레오 비전 시스템을 기능에 따라서 하드웨어와 소프트웨어 모듈로 나누어서 성능을 최대화할 수 있도록 설계하였다. SAD correlator는 한 쌍의 이미지에 많은 계산을 필요로 하기 때문에 성능을 우선시하여 하드웨어로 구성하였고, 소프트웨어는 프로세서를 초기화 시키고, 인터럽트 처리와 SAD correlator, TFT-LCD controller, 메모리 등의 하드웨어를 제어하는 역할을 하는 firmware로 구성을 하였다. 메모리에 기저장된 영상정보를 스테레오 비전 알고리즘을 이용한 결과를 외부 TFT-LCD 모듈에서 필요로 하는 포맷에 맞게 변환시켜서 depth map을 출력하는 시스템을 ARM922T 프로세서가 내장된 Altera Excalibur를 target으로 설계하여 테스트 보드에서 정상적으로 동작하는 것을 확인하였다.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.971-974
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• 2005

In this paper, we describe photonic sensor interface in SOPC(System on a programmable chip) platform. This platform uses device that has ARM922T processor and APEX FPGA area on a chip. We use two development kits. The one is embedded kit that using Intel's Xscale device, the another is SOPC kit that using Altera's Excalibur device. We implement some device logic that DMAC, ADCC, etc. and application.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.747-748
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• 2006

In this paper, we describe photonic sensor interface and driver program based on SOPC(System on a programmable chip) platform. This platform uses device that has ARM922T processor and APEX FPGA area on a chip. As for driver program development, three different methods are tried such as simple firmware, real-time OS based program and embedded Linux based program, and results are compared for SoC implementation.

• The KIPS Transactions:PartD
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• v.13D no.3 s.106
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• pp.445-454
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• 2006

Almost of industrial measuring instruments usually are equipped only with serial communication devices. In order to connect these instruments to internet, we implement an embedded translator. This device has the hardware components composed of one WAN port, two LAN ports, and two UARTs, and functions as a communication translator between serial and internet communication. it also provides web-based monitoring function that is absent from existing serial-to-ethernet converter. The hardware is implemented using the KS8695 network processor which s an ARM922T as processor core. We have installed the boa web server and utilized the CGI function for internet-based remote control, added the IP sharing function which allows the network with private IP addresses to access the internet, and developed a serial-to-ethernet translation program. Finally, we show an application example of the developed translator that remotely monitors the solar energy production system.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.959-961
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• 2003

In this paper, we describe implemented DMAC (Direct Memory Access Controller) architecture on Altera's $Excalibur^{TM}$ that includes industry-standard $ARM922T^{TM}$ 32-bit RISC processor core operating at 200 MHz. We implemented DMAC based on AMBA (Advanced Micro-controller Bus Architecture) AHB (Advanced Micro-performance Bus) interface. Implemented DMAC has 8-channel and can extend supportable channel count according to user application. We used round-robin method for priority selection. Implemented DMAC supports data transfer between Memory-to-Memory, Memory-to-Peripheral and Peripheral-to-Memory. The max transfer count is 1024 per a time and it can support byte, half-word and word transfer according to AHB protocol (HSIZE signals). We implemented with VHDL and functional verification using $ModelSim^{TM}$. Then, we synthesized using $LeonardoSpectrum^{TM}$ with Altera $Excalibur^{TM}$ library. We did FPGA P&R and targeting using $Quartus^{TM}$. We can use implemented DMAC module at any system that needs high speed and broad bandwidth data transfers.