• Title/Summary/Keyword: ARM64

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ARM Instruction Set Architecture Analysis for Binary Analysis (바이너리 분석을 위한 ARM 명령어 구조 분석)

  • Jung, Seungil;Ryu, Chanho
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2018.07a
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    • pp.167-170
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    • 2018
  • 본 논문에서는 바이너리 분석을 위한 ARM의 구조를 분석한다. 바이너리 분석이란 0과 1로 이루어진 이진 값의 의미를 분석하는 것을 말한다. 바이너리 코드를 역어셈블(Disassemble)하여 값으로만 존재하는 데이터가 어떤 명령어(Instruction)이며 어떤 피연산자(Operand)를 의미하는지 알 수 있다. 소스코드를 컴파일하여 실행파일이 생성이 되면 바이너리 값으로 구성되며 이 실행파일을 바이너리 파일이라고도 한다. 바이너리 파일을 분석하기 위해서 CPU의 명령어 집합 구조(Instruction Set Architecture)를 알아야 한다. PC와 서버, 모바일 등에서 많이 사용되고 있는 ARM 중에서 64비트를 지원하는 AArch64(ARMv8)의 명령어 구조를 분석하여 효율적인 바이너리 분석의 기반을 마련하고자 한다.

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Security Analysis of ARM64 Hardware-Based Security (ARM64 아키텍처 기반 하드웨어 보안기술 분석 및 보안성 진단)

  • Myung-Kyu Sim;Hojoon Lee
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.3
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    • pp.437-447
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    • 2023
  • Memory protection has been researched for decades for program execution protection. ARM recently developed a newhardware security feature to protect memory that was applied to real hardware. However, there are not many hardware withhardware memory protection feature and research has not been actively conducted yet. We perform diagnostics on howandhow it works on real hardware, and on security, with a new hardware memory protection feature, named 'Pointer Authentication Code'. Through this research, it will be possible to find out the direction, use, and security of future hardware security technologies and apply to the program.

Optimized Implementation of Block Cipher PIPO in Parallel-Way on 64-bit ARM Processors (64-bit ARM 프로세서 상에서의 블록암호 PIPO 병렬 최적 구현)

  • Eum, Si Woo;Kwon, Hyeok Dong;Kim, Hyun Jun;Jang, Kyoung Bae;Kim, Hyun Ji;Park, Jae Hoon;Song, Gyeung Ju;Sim, Min Joo;Seo, Hwa Jeong
    • KIPS Transactions on Computer and Communication Systems
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    • v.10 no.8
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    • pp.223-230
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    • 2021
  • The lightweight block cipher PIPO announced at ICISC'20 has been effectively implemented by applying the bit slice technique. In this paper, we propose a parallel optimal implementation of PIPO for ARM processors. The proposed implementation enables parallel encryption of 8-plaintexts and 16-plaintexts. The implementation targets the A10x fusion processor. On the target processor, the existing reference PIPO code has performance of 34.6 cpb and 44.7 cpb in 64/128 and 64/256 standards. Among the proposed methods, the general implementation has a performance of 12.0 cpb and 15.6 cpb in the 8-plaintexts 64/128 and 64/256 standards, and 6.3 cpb and 8.1 cpb in the 16-plaintexts 64/128 and 64/256 standards. Compared to the existing reference code implementation, the 8-plaintexts parallel implementation for each standard has about 65.3%, 66.4%, and the 16-plaintexts parallel implementation, about 81.8%, and 82.1% better performance. The register minimum alignment implementation shows performance of 8.2 cpb and 10.2 cpb in the 8-plaintexts 64/128 and 64/256 specifications, and 3.9 cpb and 4.8 cpb in the 16-plaintexts 64/128 and 64/256 specifications. Compared to the existing reference code implementation, the 8-plaintexts parallel implementation has improved performance by about 76.3% and 77.2%, and the 16-plaintext parallel implementation is about 88.7% and 89.3% higher for each standard.

Optimized implementation of block cipher PIPO in parallel-way on 64-bit ARM Processors (64-bit ARM 프로세서 상에서의 블록암호 PIPO 병렬 최적 구현)

  • Eum, Si-Woo;Kwon, Hyeok-Dong;Kim, Hyun-Jun;Jang, Kyung-Bae;Kim, Hyun-Ji;Park, Jae-Hoon;Sim, Min-Joo;Song, Gyeong-Ju;Seo, Hwa-Jeong
    • Proceedings of the Korea Information Processing Society Conference
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    • 2021.05a
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    • pp.163-166
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    • 2021
  • ICISC'20에서 발표된 경량 블록암호 PIPO는 비트 슬라이스 기법 적용으로 효율적인 구현이 되었으며, 부채널 내성을 지니기에 안전하지 않은 환경에서도 안정적으로 사용 가능한 경량 블록암호이다. 본 논문에서는 ARM 프로세서를 대상으로 PIPO의 병렬 최적 구현을 제안한다. 제안하는 구현물은 8평문, 16평문의 병렬 암호화가 가능하다. 구현에는 최적의 명령어 활용, 레지스터 내부 정렬, 로테이션 연산 최적화 기법을 사용하였다. 구현은 A10x fusion 프로세서를 대상으로 한다. 대상 프로세서상에서, 기존 레퍼런스 PIPO 코드는 64/128, 64/256 규격에서 각각 34.6 cpb, 44.7 cpb의 성능을 가지나, 제안하는 기법은 8평문 64/128, 64/256 규격에서 각각 12.0 cpb, 15.6 cpb, 16평문 64/128, 64/256 규격에서 각각 6.3 cpb, 8.1 cpb의 성능을 보여준다. 이는 기존 대비 각 규격별로 8평문 병렬 구현물은 약 65.3%, 66.4%, 16평문 병렬 구현물은 약 81.8%, 82.1% 더 좋은 성능을 보인다.

Safe Speed Limit of Robot Arm During Teaching and Maintenance Work (로보트 교시.정비작업시의 안전속도한계)

  • 김동하;임현교
    • Journal of the Korean Society of Safety
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    • v.8 no.1
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    • pp.64-70
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    • 1993
  • Serious injuries and deaths due to multi-jointed robot occur when a man mispercepts. especially during robot teaching and maintenance work. Since industrial robots often operate with unpredictable motion patterns, establishment of safe speed limit of robot arm is indispensable. An experimental emergency conditions were simulated with a multi-jointed robot. and response characteristics of human operators were measured. The result showed that failure type, robot arm axis. and robot arm speed had significant effects on human reaction time. The reaction time was slightly increased with robot arm speed. though it showed somewhat different pattern owing to failure type. Furthermore the reaction time to the axis which could flex or extend. acting on a workpiece directly. was fastest and its standard deviation was small. The robot arm speed limit securing a‘possible contact zone’based on overrun distance was about 25cm/sec. and in this sense the validity of safe speed limits suggested by many precedent researchers were discussed.

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A Study on Multiplier Architectures Optimized for 32-bit RISC Processor with 3-Stage Pipeline (32비트 3단 파이프라인을 가진 RISC 프로세서에 최적화된 Multiplier 구조에 관한 연구)

  • 정근영;박주성;김석찬
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.11
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    • pp.123-130
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    • 2004
  • This paper describes a multiplier architecture optimized for 32 bit RISC processor with 3-stage pipeline. The multiplier of ARM7, the target processor, is variably carried out on the execution stage of pipeline within 7 cycles. The included multiplier employs a modified Booth's algerian to produce 64 bit multiplication and addition product and it has 6 separate instructions. We analyzed several multiplication algorithm such as radix4-32${\times}$8, radix4-32${\times}$16 and radix8-32${\times}$32 to decide which multiplication architecture is most fit for a typical architecture of ARM7. VLSI area, cycle delay time and execution cycle number is the index of an efficient design and the final multiplier was designed on these indexes. To verify the operation of embedded multiplier, it was simulated with various audio algorithms.

Control Scheme Using Active Power Regulation for DC Voltage of VSC HVDC Under Unbalanced Voltage (불평형 전압 발생 시 유효전력 조절을 통한 전압형 HVDC의 DC전압 제어 방안)

  • Park, Sang-In;Huh, Jae-Sun;Moon, Won-Sik;Kim, Doo-Hee;Kim, Jae-Chul
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.2
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    • pp.232-239
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    • 2015
  • Faced with unbalanced grid operation mode, the high voltage direct current (HVDC) based on voltage source converter (VSC) can be properly controlled by a dual current control scheme. For the modular multilevel converter (MMC) controlling the AC side current is able to limit the arm current which flows along the IGBT of submodule (SM) to rated current. However the limitation of the arm current results in leaving the control range of active power at MMC confined to below the rated capacity. As a result, limiting the arm current causes the problem that the DC side voltage of the HVDC can not be controlled to the reference value since MMC HVDC adjusts the DC side voltage through the active power. In this paper, we propose the algorithm adjusting the active powers of both MMCs to resolve the problem. The back-to-back MMC HVDC applying the algorithm is modeled by PSCAD/EMTDC to verify the algorithm.

Knock-in Efficiency Depending on Homologous Arm Structure of the Knock-in Vector in the Bovine Fibroblasts (체세포에 있어서 Knock-in 벡터 상동영역 구조에 따른 Knock-in 효율)

  • Kim, Se Eun;Park, Da Som;Koo, Deog-Bon;Kang, Man-Jong
    • Reproductive and Developmental Biology
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    • v.41 no.1
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    • pp.7-16
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    • 2017
  • The knock-in efficiency in the fibroblast is very important to produce transgenic domestic animal using nuclear transfer. In this research, we constructed three kinds of different knock-in vectors to study the efficiency of knock-in depending on structure of knock-in vector with different size of homologous arm on the ${\beta}-casein$ gene locus in the somatic cells; DT-A_cEndo Knock-in vector, DT-A_tEndo Knock-in vector I, and DT-A_tEndo Knock-in vector II. The knock-in vector consists of 4.8 kb or 1.06 kb of 5' arm region and 1.8 kb or 0.64 kb of 3' arm region, and neomycin resistance gene(neor) as a positive selection marker gene. The cEndo Knock-in vector had 4.8 kb and 1.8 kb homologous arm. The tEndo Knock-in vector I had 1.06 kb and 0.64 kb homologous arm and tEndo Knock-in vector II had 1.06 kb and 1.8 kb homologous arm. To express endostatin gene as transgene, the F2A sequence was fused to the 5' terminal of endostatin gene and inserted into exon 7 of the ${\beta}-casein$ gene. The knock-in vector and TALEN were introduced into the bovine fibroblast by electroporation. The knock-in efficiencies of cEndo, tEndo I, and tEndo II vector were 4.6%, 2.2% and 4.8%, respectively. These results indicated that size of 3' arm in the knock-in vector is important for TALEN-mediated homologous recombination in the fibroblast. In conclusion, our knock-in system may help to create transgenic dairy cattle expressing human endostatin protein via the endogenous expression system of the bovine ${\beta}-casein$ gene in the mammary gland.

Methods for Improving Portability of RTiK to Real-time Performance on Linux-based Systems (리눅스 기반 실시간 성능 제공 RTiK의 이식성 향상을 위한 방법)

  • Lee, Sang-Gil;Lee, Jeong-Guk;Lee, Cheol-Hoon
    • The Journal of the Korea Contents Association
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    • v.20 no.8
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    • pp.54-64
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    • 2020
  • RTiK-Linux is a method to provide real-time performance to Linux, it is controlled by directly accessing hardware registers to implement time tick interrupts. It implemented on x86 Intel and ARM based Exynoss 5422, but it had a disadvantage that it could not be ported to both fragmented other platform environments. In this paper, We change structure of time tick interrupt for improve po rtability so that it can operate on other platforms. We apply high-resolution timers that are independent of hardware, and modify operating structure to task and event to satisfy time determinism. It was confirmed that the improved RTiK-Linux works well in x86 and various ARM AP environments.

Change of Head Position and Muscle Activities of Neck During Overhead Arm Lift Test in Subjects With Forward Head Posture

  • Kim, Tae-ho;Hwang, Byoung-ha
    • Physical Therapy Korea
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    • v.26 no.2
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    • pp.61-68
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    • 2019
  • Background: Forward head posture (FHP) is a postural alignment of the cervical vertebrae that leads to increased gravitational load on cervical segmental motions. The overhead arm lift test assesses the ability to actively dissociate and control low cervical flexion and move the shoulders through overhead flexion. Objects: The purpose of this study was to explore muscle activities in the upper trapezius (UT), serratus anterior (SA), sternocleidomastoid (SCM), and lower trapezius (LT) alongside changes in head position during the overhead arm lift test in individuals with FHP. Methods: Fifteen subjects with forward head posture and fifteen subjects with normal subjcects were enrolled in this study. The patients performed the overhead arm lift test, and muscle activities of the UT, SCM, SA, and LT were measured using surface electromyography and by evaluating changes in head position. Independent t-tests were used to detect significant differences between the two groups and Cohen's d was calculated to measure the size of the mean difference between the groups. Results: The FHP group demonstrated significantly increased muscle activity of the UT ($32.46{\pm}7.64$), SCM ($12.79{\pm}4.01$), and LT ($45.65{\pm}10.52$) and significantly decreased activity in the SA ($26.65{\pm}6.15$) than the normal group. The change in head position was significantly higher in the FHP group ($6.66{\pm}2.08$) than the normal group. Effect sizes for all parameters assessed were large between the two groups. Conclusion: The subjects with excessive FHP displayed were unable to fix their heads in position during the overhead arm lift test. The overhead arm lift test can thus be used in clinical settings to confirm control of the neck in these subjects.