• Smart Media Journal
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• v.1 no.1
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• pp.27-35
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• 2012

In this paper, the performance analysis for multimedia video codec(MPEG-4, H.264) on on-chip network communication architecture is presented. The On-Chip Network (OCN) is the new communication architecture of multimedia SoC design that overcomes the limits of On-Chip Bus architecture by providing higher data traffic bandwidth, reusability and higher scalability. We compared the performance of MPEG-4, H.264 decoder based on-chip network and AMBA on-chip bus. Experimental results show that the performance of MPEG-4, H.264 based on on-chip network is improved over 33~56% compared to the design based on AMBA on-chip bus.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.1
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• pp.107-112
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• 2012

In this contribution, we designed a general purpose input/output (GPIO) suitable for embedded systems, especially for Bluetooth baseband. Proposed architecture is compatible for the APB bus in AMBA bus architecture. General purpose I/O should be used as multi-functional and versatile interrupt sources. We considered the edge-sensitive mode as well as the level-sensitive mode for acquiring the interrupt sources. Also, we provided an option to select the operation polarity for flexible application to the embedded systems. The designed GPIO module was automatically synthesized, placed, and routed. The proposed GPIO was implemented through the Altera FPGA and well operated at 25MHz clock frequency.

• Journal of The Korean Society of Grassland and Forage Science
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• v.18 no.4
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• pp.285-290
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• 1998

aThis experiment was carried out to obtain the basic information on some factors affecting callus formation and plant regeneration in seed culture of orchardgrass. Varietal difference in callus growth and plant regeneration was obvious among four varieties of orchardgrass. "Amba" showed a relatively high capacity for plant regeneration. The $N_6$ medium was superior to MS and $B_5$ in callus formation and plant regeneration. The fresh weight of callus was promoted by the increase of dicamba concentration. However, the maximum frequency (30.0%) of plant regeneration was obtained from the callus formed in presence of 3 mg/L dicamba.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.2
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• pp.273-278
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• 2012

In this contribution, we design and implement an SPI hardware interface for the microprocessor to communicate with the MMC (Multi-Media Card) in an embedded system. Proposed architecture is compatible with the APB in AMBA bus architecture. Embedding OS in an embedded system means a big burden in terms of hardware and software ending up with performance decline. In this paper, we adopt the concept of SPI communication without using OS in the embedded system and implement in a form of FPGA chip. The designed SPI module was automatically synthesized, placed, and routed. Implementation was performed through the Altera FPGA and well operated at 25MHz clock frequency, which satisfied our target speed.

• Applied Chemistry for Engineering
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• v.27 no.5
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• pp.508-511
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• 2016

A facile synthesis of 4-(aminomethyl)cyclohexanecarboxylic acid (AMCA) from recyclable methyl 4-formylbenzoate (MFB) was described. In particular, we investigated the best process variables such as catalyst, hydrogen pressure, reaction temperature, and reaction time for AMCA conversion from AMBA through hydrogenation reaction. The best conditions were found to be as follows: the catalyst as [5% Pd/C, 5% Pt/C, 5% Rh/C (1 : 1 : 1)] which is a composite catalyst, the pressure as 30 bar, the reaction time as 8 hours and the reaction temperature at $130^{\circ}C$. Under the condition, a 90% yield (purity 99.9%) for the mass production of AMCA was achieved.

• The Journal of the Korea Contents Association
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• v.6 no.11
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• pp.225-234
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• 2006

In this paper, we design a combined security processor, ECC, MD-5, and AES, as a SIP for cryptography of securing contents. Each SIP is modeled and designed in VHDL and implemented as a reusable macro through logic synthesis, simulation and FPGA verification. To communicate with an ARM9 core, we design a BFM(Bus Functional Model) according to AMBA AHB specification. The combined security SIP for a platform-based SoC is implemented by integrating ECC, AES and MD-5 using the design kit including the ARM9 RISC core, one million-gate FPGA. Finally, it is fabricated into a MPW chip using Magna chip $0.25{\mu}m(4.7mm{\times}4.7mm$) CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.229-236
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• 2005

This paper presents a system level architecture evaluation technique that leverages transaction level modeling but also significantly extends it to the realm of system level performance evaluation. A major issue lies with the modeling effort. To reduce the modeling effort the proposed technique develops the concept of worst case scenarios. Since the memory controller is often found to be an important component that critically affects the system performance and thus needs optimization, the paper further addresses how to evaluate and optimize the memory controllers, focusing on the test environment and the methodology. The paper also presents an industrial case study using a real state-of-the-art design. In the case study, it is reported that the proposed technique has helped successfully find the performance bottleneck and provide appropriate feedback on time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.237-240
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• 2005

This paper propose an novel CAVLC architcture for H.264 and designed the CAVLC module which can be used in AMBA based design. This designed module can be operated in 420 cycle for one-macroblock and support both long-start code method using Annex B.1 and RTP. To verify the CAVLC architecture, we developed the reference C from JM8.5 and verified the our developed hardware using test vector generated by reference C. The designed circuit can be operated in 54MHz clock system, and has 14096 gate counts using Hynix 0.35 um TLM process.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.895-898
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• 2009

In this contribution, we designed a general purpose input/output (GPIO) suitable for embedded systems, especially for Bluetooth baseband. Proposed architecture is compatible for the APB bus in AMBA bus architecture. General purpose I/O should be used as multi-functional and versatile interrupt sources. We considered the edge-sensitive mode as well as the level-sensitive mode for acquiring the interrupt sources. Also, we provided an option to select the operation polarity for flexible application to the embedded systems. The designed GPIO module was automatically synthesized, placed, and routed. Implementation was performed through the Altera FPGA and well operated at 25MHz clock frequency.

• Journal of The Korean Society of Grassland and Forage Science
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• v.12 no.4
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• pp.218-225
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• 1992

This experiment was carried out to compare the varietal differences of winter hardiness based on the values of winter hardiness index(W1) and the dry weight of plant per relative tiller appearance rate (DWIRTAR), and the evaluate the method of measurements for winter hardiness in 17 orchardgrass varieties grown under mountainous area of Tackwalyon, Kangwon-do. Korea. The results were summarized as follows: 1. Seedling vigours(SV) of plant before wintering indicated highly significant negative correlation with the dry weight of 1st cutting(DW) and the dry weight of plant per relative tiller appearance rates (DWIRTAR). 2. The dry weight of 1st cutting(DW) indicated significant positive correlations with the number of tillers per plant(NT). dry weight of a tiller(WT), lield survival rate(SR). heading rate(HR) and the dry weight of heading tillers(HDW). 3. Correlation coefficients of the dry weight of 1st cutting(DW) with winter hardiness index(W1) was 0.499(p<0.05), and the dry weight of plant per relative tiller appearance rates(DW/RTAR) was 0.895(p<0.001), respectively. 4. Between the winter hardiness index(W1) and field survival rate(SR) showed highly significant positive correlation(p<0.001). And, the dry weight of plant per relative tiller appearance rates(DW/RTAR) showed highly significant positive correlation(p<0.001) with the dry weight of a tiller(WT) and the dry weight of heading tillers(HDW). 5. The varieties were classified into 2 groups by winter hardiness index(W1). The 13 varieties of Hallmark. lna, Rancho, Amba, Filippa, Sparta, Hokuto, Kitamidori, Okamidori, Wasemidori, Shinyo, Potomac and Summer-green belong to the group of W1)100, and 4 varieties of Able, Juno, Napier and Jesper belong to the group of WI(100, respectively. 6. And, also classified into 2 groups by the dry weight of plant per relative tiller appearance rates (DWIRTAR). The 4 varieties of Amba, Okamidori, Wasemidori and Summer-green belong to the group of DW1RTAR)l.O and 13 varieties of Able, Hallmark, Ina, Juno, Napier, Rancho, Filippa. Jesper, Sparta, Hokuto, Kitamidori, Shinyo and Potomac belong to the group of DW/RTAR(1.0, respectively. The variety with DW/RTAR)I.O is belong to the group of high potential winter hardiness, and also obtained a high values over the 100 of winter hardiness index(W1). 7. The dry weight of plant per relative tiller appearance rates(DW/RTAR) may be a very useful ecological character to evaluate the potential winter hardiness of orchardgrass varieties grown under mountainous area of Taekwalyon(altitudinal ranges about 800m).