• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.380-384
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• 2005

Plasma display panel (PDP) has a serious thermal problem, because the luminance efficiency of the conventional PDP is about 1.5 lm/W and it is less than $3{\sim}5$ lm/W of cathode ray tube (CRT). Thus there is a need for improving the luminance efficiency of the PDP There are several approaches to improve the luminance efficiency of the PDP and we adopt the driving PDP at high frequency range from 400 kHz up to over 700 kHz. Since a PDP is regarded as an equivalent inherent capacitance, many types of sustaining drivers have been proposed and widely used to recover the energy stored in the PDP. However, these circuits have some drawbacks for driving PDP at high frequency range. In this paper, we investigate the effect of the parasitic components of PDP itself and driver when the reactive energy of panel is recovered. Various drivers are classified and evaluated whether it is suitable for high frequency driver, and finally current-fed type with do input voltage biased is proposed. This driver overcomes the effect of parasitic component in panel and driver and fully achieves ZVS of all full-bridge switches and reduces the transition time of the panel polarity.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.88-90
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• 2006

Conventional sustaining driver (SD) of plasma display panel (PDP) employing auxiliary circuits on both side of a H-bridge inverter increases volume of PDP with cost. To solve this problem, a new single sustaining driver (SSD), which utilize only one side of auxiliary circuit is proposed. Moreover, using the voltage stress reduction technique (VSRT), the proposed SSD effectively reduces switch voltage stress with a simple structure.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2007년도 추계종합학술대회
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• pp.250-253
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• 2007

본 논문에서는 플라즈마 디스플레이 패널의 구동시 발생되는 전력손실을 최소화시키기 위한 에너지 회수기능을 가지는 새로운 서스테인 구동회로를 제안한다. 제안된 회로는 패널의 등가 커패시턴스와 외부 인덕터의 직렬공진을 이용하여 패널에 에너지를 공급/회수하게 된다. 제안된 에너지 회수 회로는 기존에 널리 이용되는 에너지 회수와 비교하여 저가형 구조로 구성이 가능하며 우수한 에너지 회수 성능을 가진다. 7.5인치 AC-PDP를 이용한 실험을 통해 제안된 회로의 타당성을 검증한다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.17-18
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• 2000

A low-power source driver for TFT-LCDs has been proposed using the triple charge sharing method that enhances the AC power saving efficiency of the prior charge sharing method. The AC power saving efficiency of the proposed source driver reaches 66.6%. In addition, a novel OP-AMP with low-quiescent current has been developed. The measured quiescent current of the OP-AMP is $5{\mu}A{\sim}7{\mu}A$ at VDD=5V and VSS=0V with load resistance of $2k{\Omega}$ and load capacitance of 300pF.

• 전력전자학회논문지
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• 제23권1호
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• pp.59-65
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• 2018

A new single-stage flyback power converter with PFC for electrolytic capacitor-less LED driver is proposed in this study. This method minimizes the peak-to-average ratio of the LED driving pulsating current by adding the LED driving current near the LED current valley area, as well as the third harmonic component injection into the input current. The reduced peak current value of the LED drive current minimizes the thermal stress of the LED itself, thereby increasing the reliability of the LED, as well as achieving a long lifetime. Simulation and experimental results show the usefulness of the proposed topology.

• 한국정보통신학회논문지
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• 제12권1호
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• pp.115-121
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• 2008

본 논문에서는 플라즈마 디스플레이 패널의 구동시 발생되는 전력손실을 최소화시키기 위한 에너지 회수기능을 가지는 새로운 서스테인 구동회로를 제안한다. 제안된 회로는 패널의 등가 커패시턴스와 외부 인덕터의 직렬공진을 이용하여 패널에 에너지를 공급/회수하게 된다. 제안된 에너지 회수 회로는 기존에 널리 이용되는 에너지 회수와 비교하여 저가형 구조로 구성이 가능하며 우수한 에너지 회수 성능을 가진다. 7.5인치 AC-PDP를 이용한 실험을 통해 제안된 회로의 타당성을 검증한다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.452-455
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• 2005

This paper proposes a new sustaining driver for AC PDP(Plasma Display Panel), which improves the performance of conventional circuit with reduced sustain voltage such as TERES(TEchnology of REciprocal Sustainer). In the TERES circuit, the sustain voltage is the half of general sustaining driver and there is no energy recovery circuit. The circuit proposed in his paper has an energy recovery circuit and removes surge currents. Although the energy recovery circuit is added, the number of active switching elements is the same as the TERES circuit. The operations of the proposed circuit are analyzed for each mode and its validity is verified by the simulations using PSpice program.

• 전력전자학회논문지
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• 제18권5호
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• pp.492-500
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• 2013

A balanced forward-flyback converter for high efficiency and high power factor using a foward and flyback converter topologies is proposed in this paper. The conventional AC/DC flyback converter can achieve a good power factor but it has the high offset current through the transformer magnetizing inductor, which results in a large core loss and low power conversion efficiency. And, the conventional forward converter can achieve the good power conversion efficiency with the aid of the low core loss but the input current dead zone near zero cross AC input voltage deteriorates the power factor. On the other hand, since the proposed converter can operate as the forward and flyback converters during switch turn-on and turn-off periods, respectively, it cannot only perform the power transfer during an entire switching period but also achieve the high power factor due to the flyback operation. Moreover, since the current balanced capacitor can minimize the offset current through the transformer magnetizing inductor regardless of the AC input voltage, the core loss and volume of the transformer can be minimized. Therefore, the proposed converter features a high efficiency and high power factor. To confirm the validity of the proposed converter, theoretical analysis and experimental results from a prototype of 24W LED driver are presented.

• 한국정보통신학회논문지
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• 제12권2호
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• pp.282-289
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• 2008

PDP TV의 전력 효율을 향상시키기 위해서는 PDP의 구동과정에서 발생하게 되는 불필요한 전력소모와 AC 입력으로부터 원하는 DC를 얻기 위한 과정 중에 발생하는 전력 소모를 최소화하여야 한다. 일반적인 PDP 구동을 위한 입력 전원단은 2단 구조의 역률 보상형 컨버터를 채용하고 있으며, PDP 구동시 전력소모가 가장 큰 서스테인 드라이버와 리셋 회로의 구동전원을 공급하기 위한 별도의 DC-to-DC 컨버터를 필요로 한다. 그러나 이러한 회로의 구현은 저가의 PDP를 요구하는 시장 상황에 유연하게 대처하는데 많은 어려움을 준다. 따라서 본 논문에서는 최소의 전력 변환단계를 가지도록 서스테인과 리셋 회로의 전원 공급이 가능한 1단방식의 역률보상형 AC-to-DC 컨버터를 제안한다. 제안하는 시스템은 1단방식의 입력전원부 구성을 통해 전력 변환단을 최소화하여 전력 변환 중에 발생하는 손실을 최소화하며, PDP 서스테인/리셋 드라이버의 구동전압을 직접 공급하는 형태로 구성하여 시스템 부피의 감소, 원가 절감을 이룰 수 있다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 추계학술대회
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• pp.193-194
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• 2011

This paper describes a control method to minimize the filter capacitor of a PFC AC/DC converter for LED driver. The rectified secondary voltage of the transformer has 120Hz ripple unlike the conventional converter for the LED drive. Therefore, the filter capacitor can be minimized and this provides reduced cost, low switching loss, and long life of the converter.