• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.18 no.1
• /
• pp.129-134
• /
• 2014

This paper presents a 10-bit 10-MS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) which consists of a digital-to-analog converter (DAC), a SAR logic, and a comparator. The designed asynchronous SAR ADC with a rail-to-rail input range uses a binary weighted DAC using metal-oxide-metal (MOM) capacitor to improve sampling rate. The proposed 10-bit 10-MS/s asynchronous SAR ADC is fabricated using a 0.18-${\mu}m$ CMOS process and its active area is $0.103mm^2$. The power consumption is 0.37 mW when the voltage of supply is 1.1 V. The measured SNDR are 54.19 dB and 51.59 dB at the analog input frequency of 101.12 kHz and 5.12 MHz, respectively.

• Journal of Korea Multimedia Society
• /
• v.10 no.10
• /
• pp.1240-1250
• /
• 2007

We introduce technique for color transformation of characters between scenes in 2D animation. As colors are perceived differently owing to light source, so character colors like clothes, skin and so on are colored differently owing to atmosphere of each scene. This paper is made an attempt to solve mathematically color assignment of characters which has been worked by hand so far. We can find a matrix for color transformation of characters by appling principle of color stimulus to our algorithm. In scenes of existing 2D animation, basic colors and colors under light source of characters are used for the matrix. And matrixes are obtained for each scenes of 2D animation. If we are known basic colors of some characters, you can derive character colors under other light source environments using the matrix. Therefore, this paper describes automatic color transformation of characters between animation scenes.

• Journal of Sensor Science and Technology
• /
• v.6 no.2
• /
• pp.137-144
• /
• 1997

In this paper, the design of a 10-bit 40-MS/s pipelined A/D converter is implemented to achieve low static power dissipation of 70 mW at the ${\pm}2.5\;V$ or +5 V power supply environment for high speed applications. A 1.5 b/stage pipeline architecture in the proposed ADC is used to allow large correction range for comparator offset and perform the fast interstage signal processing. According to necessity of high-performance op amps for design of the ADC, the new op amp with gain boosting based on a typical folded-cascode architecture is designed by using SAPICE that is an automatic design tool of op amps based on circuit simulation. A dynamic comparator with a capacitive reference voltage divider that consumes nearly no static power for this low power ADC was adopted. The ADC implemented using a $1.0{\mu}m$ n-well CMOS technology exhibits a DNL of ${\pm}0.6$ LSB, INL of +1/-0.75 LSB and SNDR of 56.3 dB for 9.97 MHz input while sampling at 40 MHz.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.18 no.12
• /
• pp.1983-1993
• /
• 1993

A power-reduction technique for full-flash A/D converters is proposed. As the resolution of a full-flash A/D converter increases linearly, the number of comparators increases exponentially. The power dissipation is generally larger than other A/D converter architectures because there are many comparators, and they are operating continuously. In this proposed architecture, only a selected number of conmarators are made to operate instead of activating all the comparators of the full-flash A/D convertor. To determine whichcomparators should be activated, voltage levelfider circuits are used. A new clock driver is developed to suppress the dynamic glitch noise which is fed back into the input stage of the comparator. By using this clock driver, the glitch noise in the current source is reduced to one fourth of that when the typical clock signal is applied. The proposed architecture has been implemented with 1.2 m 5GHz BiCMOS technology. The maximum conversion speed is 350Msamples/s. and dissipates only 900mW.

• The Journal of the Korea Contents Association
• /
• v.15 no.2
• /
• pp.31-39
• /
• 2015

2D-to-3D video conversion vests 3D effects in a 2D video by generating stereoscopic views using depth cues inherent in the 2D video. This technology would be a good solution to resolve the problem of 3D content shortage during the transition period to the full ripe 3D video era. In this paper, a low-complexity depth generation method for 2D-to-3D video conversion is presented. For temporal consistency in global depth, a pattern-based depth generation method is newly introduced. A low-complexity refinement algorithm for local depth is also provided to improve 3D perception in object regions. Experimental results show that the proposed method outperforms conventional methods in terms of complexity and subjective quality.

• Journal of Korea Water Resources Association
• /
• v.36 no.2
• /
• pp.153-159
• /
• 2003

When available rainfall data is not sufficient, a rough tendency of I-D-F relationship appeared frequently. In fact, rainfall intensity on the curve shows abnormally higher value the longer rainfall duration is applied that gives rise to great confusion to apply a rainfall I-D-F relationships curve to a practical work, however, the research work will present a way to solve above mentioned problem by the use of the Box-Cox transformation formula for a given rainfall data. The study came to a conclusion that the Box-Cox transformation formula is satisfied to utilize in a practical work on the ground of analysis for rainfall data of Sancheong and Yeongcheon.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.11 no.3
• /
• pp.129-135
• /
• 2011

In this paper, we propose the algorithm using optical flow and machine learning-based segmentation for the 3D conversion of 2D video. For the segmentation allowing the successful 3D conversion, we design a new energy function, where color/texture features are included through machine learning method and the optical flow is also introduced in order to focus on the regions with the motion. The depth map are then calculated according to the optical flow of segmented regions, and left/right images for the 3D conversion are produced. Experiment on various video shows that the proposed method yields the reliable segmentation result and depth map for the 3D conversion of 2D video.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.11 no.1
• /
• pp.23-28
• /
• 2016

In this paper, a Multi-Band Ku-band down converter was designed for reception of multi-band digital satellite broadcasting. The Multi-band low-nose down converter was designed to form four local oscillator frequencies (9.75, 10, 10.75 and 11.3GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select an one band of intermediate frequency (IF) channels by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64dB, and the noise figure of low-noise amplifier was 0.7dB, the P1dB of output signal 15dBm, and the phase noise -73dBc@100Hz at the band 1 carrier frequency of 9.75GHz. The low noise block downconverter (LNB) for receiving four-band digital satellite broadcasting designed in this paper can be used for satellite broadcasting of vessels navigating international waters.

• Journal of Broadcast Engineering
• /
• v.19 no.5
• /
• pp.606-615
• /
• 2014

This paper is to propose an algorithm for digital hologram watermarking by using a characteristic of the Fresnel diffraction model in 2D image. When 2D image is applied Fresnel transform, the result concentrates center region. When applied to a hologram, on the other hand, the result focused diffraction pattern of 2D form. Using this characteristic, to generate diffraction model by applying 2-th Fresnel transform to the hologram. Corner of diffraction model is mark space. This mark space is embedded watermark and extracted watermark. Experimental results showed that all the extracted watermarks after several kinds of attacks (Gaussian blurring, Sharpening, JPEG compression) showed visibilities good enough to be recognized to insist the ownership of the hologram.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.10B
• /
• pp.1701-1706
• /
• 2000

In this work a 38 GHz hybrid 2-stage power amplifier module using GaAs pHEMTs and waveguide to microstrip transitions has been successfully developed. A 10 mil thickness duroid substrate was use for fabrication of the power amplifier and the waveguide to microstrip transitions. The fabricated waveguide to microstrip transition showed about 1 dB insertion loss(back to back) at 32-40 GHz. The measured results of power amplifier module showed 29 dBm output power(P1.5dB), 7,2 dB associated gain and 11.2% power-added efficiency(PAE) at 36.8-38.5 GHz.