• Title/Summary/Keyword: 5-level inverter

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A Study on the 3 phase 5 level PWM inverter reducing harmonics (고조파 저감형 3상 5레벨 PWM 인버터에 관한 연구)

  • 송언빈
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 1995.10a
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    • pp.80-84
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    • 1995
  • ABSTRACT - This paper presents a software based 3 phase 5 level pulse-width modulation(PWM) inverter to reduce total harmonic distortion. The proposed modulation technique can reduce total harmonic distortion and significantly improve the performance of the inverter. In the modulation mode where the frequency ratio is 36 and modulation index is 1.2∼2.0, harmonic components have been mostly eliminated and the magnitude of fundamental component have been maximized by the 3 phase 5 level PWM inverter.

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A Study on Composition of A Novel Single Phase 3 Level Inverter Circuit (새로운 단상 3전위 인버터회로의 구성에 관한 연구)

  • 이종수;백종현
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.9 no.5
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    • pp.51-56
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    • 1995
  • The transistors of single phase 3 level PWM Inverter compose output power transistors and neutral point clamping transistors, which are NPN transistors. Waveforms of driving signals for this are PWM waves for power transistors and period operating waves for neutral point clamping transistors, which signals made W-type modulation from rectangular and sine wave. The output power transistors operate at ON-time complementary and neutral point clamping transistors operate at OFF-time complementary respectively. Therefore, each transistors operate in half period at parallel. Characteristics of this inverter circuit is parallel switching method about series switching method of general inverter. As modulation of 3 level drive signals made from full-wave rectifier of sine wave and rectangular wave, which are level wave about 3 level of complementary transistor inverter. So, this circuit composed complementary operation inverter of NPN transistors only compare with PNP-NPN complementary inverter, which have high power 3 level inverter of complementary operation.

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Power Conditioning for a Small-Scale PV System with Charge-Balancing Integrated Micro-Inverter

  • Manoharan, Mohana Sundar;Ahmed, Ashraf;Seo, Jung-Won;Park, Joung-Hu
    • Journal of Power Electronics
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    • v.15 no.5
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    • pp.1318-1328
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    • 2015
  • The photovoltaic (PV) power conditioning system for small-scale applications has gained significant interest in the past few decades. However, the standalone mode of operation has been rarely approached. This paper presents a two-stage multi-level micro-inverter topology that considers the different operation modes. A multi-output flyback converter provides both the DC-Link voltage balancing for the multi-level inverter side and maximum power point tracking control in grid connection mode in the PV stage. A modified H-bridge multi-level inverter topology is included for the AC output stage. The multi-level inverter lowers the total harmonic distortion and overall ratings of the power semiconductor switches. The proposed micro-inverter topology can help to decrease the size and cost of the PV system. Transient analysis and controller design of this micro-inverter have been proposed for stand-alone and grid-connected modes. Finally, the system performance was verified using a 120 W hardware prototype.

Single Phase 5-level Inverter with DC-link Switches (DC링크 스위치를 갖는 단상 5레벨 인버터)

  • Choi, Young-Tae;Sun, Ho-Dong;Park, Min-Young;Kim, Heung-Geun;Chun, Tea-Won;Nho, Eui-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.3
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    • pp.283-292
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    • 2011
  • This paper proposed a new multi-level inverter topology based on a H-bridge with two switches and two diodes connected to the DC-link. The output voltage of the proposed topology is quite closer to a sinusoidal waveform compared with a typical single phase inverter. The proposed multi-level inverter is applicable to a power conditioning system for renewable energy sources, and it can be also used as a building block of a cascaded multi-level inverter for a high voltage application. In case of conventional H-bridge type or NPC type multi-level inverter, 8 controllable switches are used to obtain a 5 level output voltage, but the proposed multi-level inverter requires only 6 controllable switches. Thus the circuit configuration is quite simple, reliable and cost-effective implementation is possible. The efficiency can be improved owing to the reduction of the switching loss. A new PWM method based on POD modulation is suggested which requires only one carrier signal. The switching sequence to make the capacitor voltage balanced is also considered. The feasibility is studied through simulation and experiment.

The effect of Harmonic Distortion Reduction on Three Phase Three level Inverter Using Neutral Point Control (3상 3레벨 인버터의 중성점 제어를 이용한 고조파 왜율 저감 효과)

  • Kim, Jeong Gyu;Yang, Oh
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.3
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    • pp.90-94
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    • 2018
  • In this paper, we applied a three-level T-type inverter with the one more voltage level than two-level inverter. However, the three-level T-type inverter has a systematic problem with voltage unbalances. So neutral point control is essential. Therefore, the voltage unbalance problem of the three - phase inverter was confirmed to be controlled within 5V using the neutral point control algorithm in charge and discharge mode. In addition, total harmonic distortion was reduced in three phases (u phase, v phase, w phase) when neutral point control was performed in charging mode and also in three phases (u phase, v phase, w phase) in discharge mode. In this paper suggests a neutral point control algorithm to solve the voltage unbalance of a three-level T-type inverter, and shows the improvement of the performance of the proposed algorithm through experiment.

Modeling and Experimental Validation of 5-level Hybrid H-bridge Multilevel Inverter Fed DTC-IM Drive

  • Islam, Md. Didarul;Reza, C.M.F.S.;Mekhilef, Saad
    • Journal of Electrical Engineering and Technology
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    • v.10 no.2
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    • pp.574-585
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    • 2015
  • This paper aims to improve the performance of conventional direct torque control (DTC) drives proposed by Takahashi by extending the idea for 5-level inverter. Hybrid cascaded H-bridge topology is used to achieve inverter voltage vector composed of 5-level of voltage. Although DTC is very popular for its simplicity but it suffers from some disadvantages like- high torque ripple and uncontrollable switching frequency. To compensate these shortcomings conventional DTC strategy is modified for five levels voltage source inverter (VSI). Multilevel hysteresis controller for both flux and torque is used. Optimal voltage vector selection from precise lookup table utilizing 12 sector, 9 torque level and 4 flux level is proposed to improve DTC performance. These voltage references are produced utilizing a hybrid cascaded H-bridge multilevel inverter, where inverter each phase can be realized using multiple dc source. Fuel cells, car batteries or ultra-capacitor are normally the choice of required dc source. Simulation results shows that the DTC drive performance is considerably improved in terms of lower torque and flux ripple and less THD. These have been experimentally evaluated and compared with the basic DTC developed by Takahashi.

Optimized Space Vector Pulse-width Modulation Technique for a Five-level Cascaded H-Bridge Inverter

  • Matsa, Amarendra;Ahmed, Irfan;Chaudhari, Madhuri A.
    • Journal of Power Electronics
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    • v.14 no.5
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    • pp.937-945
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    • 2014
  • This paper presents an optimized space vector pulse-width modulation (OSVPWM) technique for a five-level cascaded H-bridge (CHB) inverter. The space vector diagram of the five-level CHB inverter is optimized by resolving it into inner and outer two-level space vector hexagons. Unlike conventional space vector topology, the proposed technique significantly reduces the involved computational time and efforts without compromising the performance of the five-level CHB inverter. A further optimized (FOSVPWM) technique is also presented in this paper, which significantly reduces the complexity and computational efforts. The developed techniques are verified through MATLAB/SIMULINK. Results are compared with sinusoidal pulse-width modulation (SPWM) to prove the validity of the proposed technique. The proposed simulation system is realized by using an XC3S400 field-programmable gate array from Xilinx, Inc. The experiment results are then presented for verification.

PID Controller Tuning using Co-Efficient Diagram method for Indirect Vector Controlled Drive

  • Durgasukumar, G.;Rama Subba Redddy, T.;Pakkiraiah, B.
    • Journal of Electrical Engineering and Technology
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    • v.12 no.5
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    • pp.1821-1834
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    • 2017
  • Medium voltage control applications due to obtain better output voltage and reduced electro-magnetic interference multi level inverter is used. In closed loop control with inverter, the PI controller does not operate satisfactorily when the operating point changes. This paper presents the performance of Co-Efficient diagram PI controller based indirect vector controlled induction motor drive fed from three-level inverter under different operating conditions (dynamic and steady state). The proposed Co-Efficient diagram PI controller based three level inverter significantly reduces the torque ripple compared to that of conventional PI controller. The performance of the indirect vector controlled induction motor drive has been simulated at different operating conditions. For three-level inverter control, a simplified space vector modulation technique is implemented, which reduces the coordinate transformations complications in the algorithms. The performance parameters, torque ripple contents and THD of induction motor drive with three-level inverter is compared under different operating conditions using CDM-PI and conventional PI controllers.

Hybrid Multilevel Inverter Connecting a Full-bridge Inverter to a 5-level Inverter in Series (풀-브리지 인버터와 5-레벨 인버터의 직렬결합을 이용한 혼합형 멀티레벨 인버터)

  • Hong, Un-Taek;Choi, Won-Kyun;Kwon, Cheol-Soon;Kang, Feel-Soon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.1
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    • pp.30-37
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    • 2011
  • This paper presents a circuit configuration of multilevel inverter to synthesize a large number of output voltage levels by connecting a full-bridge inverter to a 5-level inverter in series. We analyze the characteristics by computer-aided simulations and experiments when it has input voltage sources which have the same and the power of three in the amplitude. In addition, it is compared with the conventional transformer based multilevel inverter.

Multilevel Inverter using Two 5-level Inverters Connected in Series (두 대의 5-레벨 인버터의 직렬결합을 이용한 멀티레벨인버터)

  • Choi, Won-Kyun;Kwon, Cheol-Soon;Hong, Un-Taek;Kang, Feel-Soon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.5
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    • pp.376-380
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    • 2010
  • This paper presents a circuit configuration of multilevel inverter to increase the number of output voltage levels by using conventional 5-level inverters connected in series. Most of all it can maximize the number of output voltage levels by employing input voltage sources, which have the power of five. When it synthesizes the same number of output voltage levels, the proposed inverter can save the number of switching devices compared with the conventional cascaded H-bridge cell inverter. So it can reduce the size, cost, power consumption of the system. We implemented computer-aided simulation and experiments for a 25-level inverter employing two 5-level inverters.