• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.340-340
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• 2004

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.5
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• pp.1038-1043
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• 2003

A capacitive-coupled configuration MEMS switch is designed and fabricated, and its characteristics are measured. Low actuation voltage has been achieved by means of small distance between signal line and membrane. Minimum actuation voltage is about 11V. Isolation is around 40dB and insertion loss is about 0.2dB at 2GHz.

• Proceedings of the KAIS Fall Conference
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• 2010.05a
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• pp.124-127
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• 2010

본 논문에서는 소형 SMD 솔레노이드 형태의 RF 칩 인덕터의 최적 구조를 도출하였다. $1.0\times0.5\times0.5mm^3$ 크기의 96% $Al_2O_3$ 코아는 $40{\mu}m$ 직경의 구리 코일을 4회 권선하여 8.57nH의 인덕턴스, 37.6의 품질계수와 6.05GHz의 SRF를 가진다. $40{\mu}m$ 직경의 구리 코일을 0.35mm 솔레노이드 길이로 중앙에 6회 권선하였을 경우가 250MHz11.2nH의 인덕턴스, 29.8의 품질계수와 5.6GHz의 SRF로 가장 우수하였다.

• Journal of electromagnetic engineering and science
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• v.18 no.3
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• pp.188-198
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• 2018

In this study, we propose an approach for the design and satisfy the requirements of the fabrication of a small, lightweight, reliable, and stable ultra-wideband receiver for millimeter-wave bands and the contents of the approach. In this paper, we designed and fabricated a stable receiver with having low noise figure, flat gain characteristics, and low noise characteristics, suitable for millimeter-wave bands. The method uses the chip-and-wire process for the assembly and operation of a bare MMIC device. In order to compensate for the mismatch between the components used in the receiver, an amplifier, mixer, multiplier, and filter suitable for wideband frequency characteristics were designed and applied to the receiver. To improve the low frequency and narrow bandwidth of existing products, mathematical modeling of the wideband receiver was performed and based on this spurious signals generated from complex local oscillation signals were designed so as not to affect the RF path. In the ultra-wideband receiver, the gain was between 22.2 dB and 28.5 dB at Band A (input frequency, 18-26 GHz) with a flatness of approximately 6.3 dB, while the gain was between 21.9 dB and 26.0 dB at Band B (input frequency, 26-40 GHz) with a flatness of approximately 4.1 dB. The measured value of the noise figure at Band A was 7.92 dB and the maximum value of noise figure, measured at Band B was 8.58 dB. The leakage signal of the local oscillator (LO) was -97.3 dBm and -90 dBm at the 33 GHz and 44 GHz path, respectively. Measurement was made at the 15 GHz IF output of band A (LO, 33 GHz) and the suppression characteristic obtained through the measurement was approximately 30 dBc.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.117-122
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• 2016

In this paper, we propose 24-GHz CMOS radio frequency (RF) power amplifier for short-range automotive collision avoidance radars. This circuit contains common source stage with inter-stages conjugate matching circuit as a class-A mode amplifier. The proposed circuit is designed using TSMC $0.13-{\mu}m$ mixed signal/RF CMOS process ($f_T/f_{MAX}=120/140GHz$). It operates at the supply voltage of 2V, and it is designed to have high power gain, low insertion loss and low noise figure in the low supply voltage. To reduce total chip area, the circuit used transmission lines instead of the bulky real inductor. The designed CMOS power amplifier showed the smallest chip size of $0.1mm^2$, the lowest power consumption of 40mW, the highest power gain of 26.5dB, the highest saturated output power of 19.2dBm and the highest maximum power-added efficiency of 17.2% as compared to recently reported results.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.12
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• pp.30-36
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• 2009

Various types of ultra-wideband components with 10's of GHz bandwidth have been developed utilizing a uniplanar ultra-wideband balun, which is a simple microstrip-to-coplanar stripline (CPS) transition structure with the operating frequency range from near DC to over 40 GHz. Developed ultra-wideband components include antennas, mixers, doublers, and detectors in a carrier type and in a surface mountable type. One of surface mountable components, for example, single balanced doubler has output frequency 8 ~ 28 GHz. These high-Performance, low-cost ultra-wideband components may replace expensive conventional components, and also can be used to develop new multi-GHz OWE application areas.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.10a
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• pp.630-633
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• 2001

본 논문에서는 2.3GHz대역의 WLL(무선가입자 회선망)에 사용하는 전압제어발진기를 설계하였다. 설계된 전압 제어 발진기는 3.2V, 10mA에서 동작하고 출력은 0.67dBm, 위상잡음 특성은 100kHz 옵셋 주파수에서 -102dBc/Hz이고 동조대역폭은 1V-3V의 전압변화에 2200∼2240MHz까지 40MHz의 동조 대역폭을 얻을 수 있었다. 따라서 제작된 전압제어 발진기는 무선가입자 회선망에 적용할 수 있다고 본다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.10A
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• pp.830-837
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• 2003

The interests of HEO is growing due to the congestion of GSO. ITU-R is studying about the pfd for HEO FSS in the 4GHz and 11GHz bands that will adequately protect the FS and, at the same time, will better reflect HEO FSS satellite requirements. We simulated and analysed the interference effects from the USAKU-H2 type of HEO FSS system into the FS receive station in these bands. Based on our analysis, we evaluated if the pfd masks proposed in ITU-R provided the appropriate protection to the FS located at near latitude 40$^{\circ}$N.

• ETRI Journal
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• v.40 no.6
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• pp.693-698
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• 2018

This paper presents a true-time delay (TTD) using a commercial $0.13-{\mu}m$ CMOS process for wideband phased-array antennas without the beam squint. The proposed TTD consists of four wideband distributed gain amplifiers (WDGAs), a 7-bit TTD circuit, and a 6-bit digital step attenuator (DSA) circuit. The T-type attenuator with a low-pass filter and the WDGAs are implemented for a low insertion loss error between the reference and time-delay states, and has a flat gain performance. The overall gain and return losses are >7 dB and >10 dB, respectively, at 2 GHz-18 GHz. The maximum time delay of 198 ps with a 1.56-ps step and the maximum attenuation of 31.5 dB with a 0.5-dB step are achieved at 2 GHz-18 GHz. The RMS time-delay and amplitude errors are <3 ps and <1 dB, respectively, at 2 GHz-18 GHz. An output P1 dB of <-0.5 dBm is achieved at 2 GHz-18 GHz. The chip size is $3.3{\times}1.6mm^2$, including pads, and the DC power consumption is 370 mW for a 3.3-V supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.5
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• pp.938-943
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• 2015

The proposed circular patch antenna was designed to include relative bandwidth of above 25% as designed by the FCC in the FCC in the 3.1 ~ 10.6 GHz band. The antenna was induced to have a wide band characteristic through two structures of the usual microstrip line and a microstrip line with a linear change in impedance. The proposed finally antenna was designed using an FR4_epoxy substrate with 4.7% permittivity, 0.02 of loss tangent, and 1.6 mm of thickness, and was simulated with the use of HFSS made by Ansys. Return loss at frequency, VSWR, radiation pattern and the gain of the antenna were analysed. As a result, if satisfied a return loss of -10 dB and $VSWR{\leq}2$ from 2.28 ~ 13.35 GHz, showing about the bandwidth of 11.89 GHz, and the radiation pattern was unidirectional in all bands. The antenna gain gradually increased from 2 ~ 8 GHz and had the highest gain of 7.92 dBi at 8 GHz. and the gain gradually decreased in the 9 ~ 12 GHz band.